AD7960 misbehaves

I am trying to control the AD7960 evaluation board using an FPGA. The output data seems wrong as can be seen in this screenshot (CH1 is CNV+, CH2 is D+, CH3 is DCO+):

The lower bits are noisy, but this is not my main concern at the moment. What is strange is that the 2 bits marked by the cursors (bits 13 and 4, if you count from 17 down to 0) are always 0. Also, applying 0V on the analog input results with a negative digital output. The change in sign is around 0.7V. In the screenshot the input voltage is about 1.5V.

Here is my setup:

The evaluation board is powered with 12V.

All jumpers are at their default position.

Enable bits are EN2=0, EN1=0, EN0=1.

I'm not sure if REFIN is 0v or 2.048V. This is not clear in the evaluation board documentation.

The clock rate is 3MHz. This is to insure low noise. It is also harder to see higher frequencies on the scope.

The signals in the scope seem to have an amplitude of only 300mV. If I disconnect them from the FPGA, the amplitude is 1.8V.

The signals are connected to LVDS pins in the FPGA.

Any hints on what is going on would be welcome.

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  • 0
    •  Analog Employees 
    on Sep 17, 2015 6:03 PM

    You can not use the AD7960 in this fashion as it is a true differential input part. If you read the entire thread and datasheet carefully, there is a tight common mode voltage spec of VREF/2 +/-5%. This requires the differential inputs must swing equally and in opposite phase around VREF/2 (See figure 32), otherwise performance will drop off dramatically. Even if you try to use the part in this manner, you would likely lose half the available input range. You'll need to use a single-ended to differential driver stage before the ADC. If you want a single ended / pseudo diff input ADC then you should look at the other offerings from ADI's Pulsar family of parts, eg. AD7988-1/-5,  AD7685/6.

    You must set the enable pins in your set up as per your requirements. Refer to table 8 in the datasheet.

Reply
  • 0
    •  Analog Employees 
    on Sep 17, 2015 6:03 PM

    You can not use the AD7960 in this fashion as it is a true differential input part. If you read the entire thread and datasheet carefully, there is a tight common mode voltage spec of VREF/2 +/-5%. This requires the differential inputs must swing equally and in opposite phase around VREF/2 (See figure 32), otherwise performance will drop off dramatically. Even if you try to use the part in this manner, you would likely lose half the available input range. You'll need to use a single-ended to differential driver stage before the ADC. If you want a single ended / pseudo diff input ADC then you should look at the other offerings from ADI's Pulsar family of parts, eg. AD7988-1/-5,  AD7685/6.

    You must set the enable pins in your set up as per your requirements. Refer to table 8 in the datasheet.

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