AD7176-2 sampling rate mismatch in Cont. Read Mode

Dear all,

I analysed the data coming from 2 AD7176-2 EVBs and have questions regarding the stated sampling rate.

In cont. read mode, 4 channels, default filter (sinc5+1), I measure DOUT/RDY timing (with Logic 1.1.15)

Reg setting        Measurements-->

fs/ksps               pulsewidth/us          period/us               f/kHz               ratio f/fs

250                    1.12                         4.00                         250               1.0               (GOOD, as expected)

125                    1.12                         24.12                       41.46               0.322

50                      1.12                         36.1                         27.68               0.554

25                      1.12                         56.12                       17.82               0.713

a) I do not understand why the boards do not deliver correct DOUT/RDY periods (see ratio) apart from 250ksps.

b) Why is there a settling time of 20us stated in the datasheet when one does not see any effect?

unless it means that a period of 4us delivers 17 error free bits at 250ksps, or 24 "error free bits" at 50ksps (1/20us) or

50ksps/Ch# (in my example is this 12.5ksps per channel), or (1/20us) deliver 17 error freee bits at 250ksps (Table 18 of datasheet).

To me it looks as if this converter cannot deliver 250ksps and/or accurate fs below 250ksps. Not sure if or what I confuse.

Would appreciate if anyone could shed light in my observation.

Rudy

  • 0
    •  Analog Employees 
    on Aug 31, 2014 10:46 PM

    Hi,

    We are looking into this. We'll get back to you as soon as possible.

    Thanks and Best Regards,

    Chris

  • 0
    •  Analog Employees 
    on Sep 10, 2014 12:15 AM

    Hi Rudy,

    When multiple channels are enabled, a complete settling time is required for every channel switch. This is to allow the digital filters and modulator to settle when switching channels.

    In this case, the rate at which data is available(DOUT/RDY pulls low) for multiple channels would be dependent on the corresponding settling time for the output data rate(ODR) set. This, then, equates to  the switching rate which is 1/settling time. The settling time values for SINC5+1 filter configuration is shown in table.18 in page 28 of the AD7176-2 REV.A datasheet.

    For example. with a filter configuration of SINC5+1 and ODR of 50,000SPS, the settling time is 36us. Theswitching rate would be:

     

    Switching rate= 1/ tsettle

                          =1/36us

                          =27,778 SPS

        where: tsettle= settling time

    Thanks and Best Regards,

    Chris