Hi to all,
my acquisition and processing board has 12 AD7626 channels interfaced with a FPGA.
I have to provide a voltage reference source for all ADCs in simultaneous acquisition mode at 10MSPS.
So, following the application note "Voltage Reference Design for Precision Successive-Approximation ADCs" by Alan Walsh,
I choose the topology using a unit gain op-amp amplifier for each ADC (each op-amp fed from a unique ADR4540 voltage reference): see the topology below suggested in the AD7626 datasheet.
Supposing a AD7626 Vref input current value of 3.3mA average (10 times the AD7980; 1MSPS Pulsar ADC), I should
select a op-amp with internal output impedance low as 0.01 Ohm at 10MHz: this value is too low even for hi-speed op-amp like ADA4841.
So my question is regarding the AD7626 Ref input current value: is my hypothesis correct (Iref = 10 * Irref_AD7980)?
May be the AD7626 has a different internal topology and, for this reason, the Iref value is negligible and is not provided?
Thank you for any help.
The reference current draw of the AD7626 is not 10*AD7980. It's not specified in the datasheet but typically ~600uA. In the article you will see that i state the impedance at higher frequencies is handled by the 10uF cap. For example at 10MHz the impedance of the 10uF cap is 0.0016 ohms which is more than good enough to handle any noise/disturbance at the sample rate. The buffer really only needs to have low impedance from DC up to either the input signal bandwidth your interested in or where the impedance of the capacitor becomes low enough that the buffer output impedance no longer matters. Whats your input signal bandwidth? Also this is meant as a guideline, the output impedance calculated is for 0.5lsb droop in the reference, you may be able to handle more droop. It will just mean an extra gain error term in your conversion result. The AD8031 and ADA4841 should work fine as buffers here. There is also an even newer ref buffer the ADA4805-1 which has better offset and drift numbers.
thank you very much for help.
Respect to the relation with signal bandwidth: at glance the Ref current harmonic contents seems to have a strong relation with sampling rate, and with higher frequencies due to capacitors switching process within the conversion interval.
A curiosity: have you measured the current or have you received the info from Analog? The AD7626 datasheet seems too poor of useful data.
Thank you again
I work for Analog and help support this product. The 600uA typical ref current comes from measurement data. I agree that this info should be added to the datasheet and will make a note to add it on the next revision.
You are correct that the ref current will have strong harmonic content at the sampling rate (10MHz) and as i explained this is squashed by the reference reservoir capacitor, not the buffer. The buffer helps to top up the reservoir cap between conversions and also handle any lower frequency ripple due to modulation of the reference with the input signal. The buffer also handles the DC average current draw so the ref does not droop too much as discussed. If you were to plot the impedance of the buffer and cap versus frequency you would see the buffer output impedance increase with frequency and the capacitor impedance decrease with frequency. With both of them working together you hope to keep the impedance of the ref driver circuit low across the frequency range.
it's very clear now.
Thank you very much for help.