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AD7998 instable conversion results

antonio64
on Nov 28, 2014

Hello,

I am testing the AD7998 on several identical boards. I get 50 samples each second and provide the average of these conversion data.

VREF is provided by REF195. The input data are buffered and filtered and perfectly stable (measured with a precision voltmeter)

On some boards the ADC data is perfectly stable and repeatable at each powerup.

On other boards the conversion results float slowly every 3-4 sec in a range of 10 ADU 

On other boards after power-up with stable input the conversion results starts from different values (also 100 ADU far from the stable value) and reach a stable value after some seconds (also a minute).

I am reading the data after 5us the falling edge of CONVST.

Any suggetsions?

Thanks

Antonio

  • 0
    •  Analog Employees 
    on Dec 4, 2014 12:17 AM over 6 years ago

    Hi antonio64,

    Let me check on this. In the mean time, can you send me your schematic?

    Regards,

    May

  • 0
    •  Analog Employees 
    on Dec 15, 2014 8:02 PM over 6 years ago

    Hi antonio64, You've mentioned you are using REF195 as your reference. Can you check the VREF if it is stable specially on the problematic boards? Also, please check other components such as decoupling capacitors on those boards for these might also cause some errors in the ADC. Can you share me your schematic so I can look at this further? Regards, May

  • 0
    •  Analog Employees 
    on Dec 17, 2014 10:35 PM over 6 years ago

    Hi Antonio,

    Please take note that it is not advisable to leave the input pins of the amplifiers to be in a floating condition for this would be considered at an unknown state. In this case it outputs to its rail which is +12V. If you could take a look at the absolute maximum ratings of the AD7998 datasheet, the analog input voltage to GND should be in the range of -0.3V to Vdd+0.3V.


    In the TOTEM schematic the VDD of the ADC is at +5V only, therefore, when the amplifier inputs are floating +12V goes to the ADC which exceeds the ADC analog input voltage ratings. This stresses above the absolute maximum ratings that may cause permanent damage to the device. I recommend that in testing the boards, you should tie the inputs to any input level as long as it is within the analog input voltage range of the ADC.



    Regards,

    May

  • 0 on Dec 17, 2014 11:03 PM over 6 years ago

    Hello here the sch.

    The Vref is OK.

    I have a doubt about the fact that some ADC could be damaged because of having some inputs floating during testing and these inputs arrive to the opamp stage and so providing to the ADC also 11V as input.

    Thanks a lot.

    Antonio

    TOTEM-Project.pdf