AD7960 timing parameters

In table3 of AD7960 datasheet, there are two timing parameters tMSB and tCLKL. But there is no any information to explain how to slelect correct values for them. Should the maxiam values be OK? Or should some other rules must follow?

Thanks

Parents
  • 0
    •  Analog Employees 
    on Jan 25, 2015 7:01 PM

    Hi,

    As long as you do not exceed these maximum values, it's fine. As stated in the datasheet, "After tMSB, elapses, the host begins to burst the CLK± signal to the AD7960...The required 20 CLK± pulses must finish

    before tCLKL (referenced to the next conversion phase) elapses. Otherwise, the data is lost because it is overwritten by the next conversion result."

    Regards,

    Karen

Reply
  • 0
    •  Analog Employees 
    on Jan 25, 2015 7:01 PM

    Hi,

    As long as you do not exceed these maximum values, it's fine. As stated in the datasheet, "After tMSB, elapses, the host begins to burst the CLK± signal to the AD7960...The required 20 CLK± pulses must finish

    before tCLKL (referenced to the next conversion phase) elapses. Otherwise, the data is lost because it is overwritten by the next conversion result."

    Regards,

    Karen

Children
No Data