I have a question from a customer about timing parameter of AD7688.
The VIO range is described as 1.8V to Vdd+0.3 in page4 of the datasheet.
But "specified performnace" range is 2.3V to Vdd+0.3V.
Our customer wants to know the I/O timing at 1.8V VIO.
Do you have any timing data which can be used as reference ?
I'll get back to you with what I find about this in the next couple of days.
Unfortunately we don't have timing data for the digital interface at VIO=1.8V. The part may work but we cannot guarantee that it will be able to run at its specified maximum throughput of 500 kSPS. We do have other parts with similar digital interfaces that are specified at VIO= .8V that can be used as a rough guideline. For that product, the SCK Falling Edge to Data Valid Delay (tDSDO)=28ns. To output a 16-bit word with this delay, it would require an acquisition time of 448 ns rather than the specified 400 ns of the AD7688. In this example, the achievable sample rate would be limited to ~488 kSPS. This is just a guideline, however, and we cannot guarantee a maximum throughput for the AD7688 under these conditions.
Thank you for your support.
I'll inform your comment to our customer.