AD7682 severely influences input signal

Question

Hello, 
 In a current design for a test system, we use a power supply circuit with variable current limit and voltage setting. This circuit is controlled with DAC's and measured with ADC's (AD7949BCPZ). 
 Attatched picture "PSU circuit.jpg" shows the circuit. In this circuit, the ports 'PSU_Imeas' and 'PSU_Vmeas' are connected to ADC inputs. This circuit operates exactly as intended. 
 When operating the ADC, it is impossible to achieve accurate readings. After investigation we notice a strange phenomenom: when the ADC acquires data, the signal it is supposed to measure is pulled to ground, followed by heavy oscillations. 
 The effect is more pronounced at PSU_Imeas, but nonetheless present at the PSU_Vmeas node. Attached to this post you can find a screenshot of what we see on the oscilloscope, where the yellow signal is the ADC CONV signal and blue is the PSU_Imeas node. 
 We tried replacing the ADC with different models in the same family: the AD7682 and AD7689. Both gave similar results. 
 We checked the opamp datasheet, it should not have any problem driving the load. 
 Has anyone seen this happen in their project? Any idea what it might be caused by?

FormerMember · Accepted Answer

Bert, 
 I'm having trouble figuring out exactly what you want to do, but some comments: 
 -- Resistor values too high around a 100 MHz op amp. 
 -- RRO op amps have higher output impedance and can't drive much capacitance; looks like 
 the 6207 is good for about 20 pF. SAR ADCs have dynamic input impedance. This is probably 
 what is going on. Use an isolation resistor; see op amp d.s. Or add an R-C anti-aliasing filter 
 -- You are using 3mV op amps w/ a 16 bit converter? For precision analog, I am not a fan of quads. See: 
 http://www.planetanalog.com/document.asp?doc_id=528114 
 and 
 Planet Analog - Articles - Op amps: to dual or not to dual? (Part 2 of 2) 
 -- Op amps, comparators, and InAmps are all drawn as triangles; they are NOT the same. I NEVER 
 use an op amp as a comparator. See footnote 2 in the reference above. 
 -- Try an ADA4084-4 or an ADA4096-4. 
 Harry)

FormerMember · Answer

Bert, 
 With 2 pF of input capacitance and 1pF of pc board stray, a 10k feedback resistor will give 
 you a pole at 5.3 MHz where the op amp has lots of gain. We have op amps with 5,000 V/us SR 
 and gbw over 1 GHz, so we get a lot of calls and emails: "Why is my op amp oscillating...." 
 GBW is similar to hamburgers: If you have 90% lean ground beef, it's dry, if you have 60% lean, 
 it's a grease burger. You need enough gbw to do the job, but not a lot more. 
 BTW, what supply voltage(s) on the op amp?? 
 When loops are large, the time delay can affect the stability. I like to have local feedback on each 
 stage when cascading multiple stages. 
 I don't think you really need OP3C. You just add offset. R43 should be able to drive R47 and R48 directly. 
 If OP3D is meant to be the classic four resistor difference amp, then you need a matching cap across 
 R49 equal to C150, otherwise, your AC CMRR is poor. 
 Can you show a bit more of the schematic over to the ADC? 
 Harry

FormerMember · Answer

Bert, 
 You had mentioned earlier: 
 "...The effect is more pronounced at PSU_Imeas, but nonetheless present at the PSU_Vmeas node." 
 You could try one or all of the following experiments: 
 -- Switch to a slower op amp 
 -- Cut the traces over to the ADC and insert 100 ohm resistors. 
 -- Add a 22 pF cap to PSU1_Imeas and see if the problem gets worse 
 -- Change all your 10k resistors to 2k. Even if the oscillation doesn't go away, record the amplitude 
 and frequency before and after. 
 Harry

FormerMember · Answer

Bert, 
 Whether you use an op amp or a real comparator, if the input signal goes slowly through the threshold, 
 you can get oscillation, so hysteresis should always be used around a comparator function. See fig 6 in: 
 http://www.analog.com/media/en/training-seminars/tutorials/MT-083.pdf 
 Even with hysteresis added, it seems to me when you get an over current condition, the comparator will 
 shut off T1, but then you don't have an over current condition, so T1 will turn back on. So you should 
 get an "oscillation" from the topology itself without a latch function. 
 Harry

EZAdministrator · Answer

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AD7682 severely influences input signal