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AD7730 Internal-zero-scale calibration

Hi, I am using the AD7730 and i have some problems with the Internal zero-scale calibration. I use the SPI interface to communicate between my uC and the AD converter.

I am able to wirte and read from the registers of the AD7730.

The converter is configured in bipolare mode, HIREF = 1( 5V ), Range : +-10mV, 16bit mode.

I am using two AD7730 parallel which are selected with two CHIP-Select.

 

After a calibration cycle the value of the corresponding Offset-Register changed by a very small value but there is still an offset(approx. 30150) to the expected value of 32768 when the input pins are shorted.

 

Has anyone any advices?

 

  • HI Michael,

    We are currently looking into this. I will get back to you shortly.

    Regards,

    RC

  • Hi Michael,

    Have you tried doing an internal full-scale calibration?  It possible that the error might be caused by the gain errors internal to the device. I would suggest you do an internal full-scale and zero-scale calibration to see if you could improve the results.  Note that a full-scale calibration must be done before the zero-scale calibration. Also, it is recommended that full-scale calibrations be performed on the 80 mV range. You can then do the zero-scale calibration on your operating range which +/-10mV.

    Regards,

    RC

  • Hi Cristopher

    This is exactly what im doing. First i perform an internal full-scale calibration with the range +/- 80mV after that i am waiting for the /RDY bit in the Status register. After the bit goes low again i perfom an internal zero-scal calibration(+/- 10mV Range). The value of the Gain and the Offset register changed but the offset to the expected value(32768) is still there.

    Regards,

    Michael

  • Hi Michael,

    At what output data rate are you doing the calibration? Can you try calibrating the part at its lowest data rate?

    Regards,

    RC


  • Hi RC

    The ouput data rate can be changed by changing the value of the filter register, right?

    If this is correct then i already calibrate the part at its lowest data rate. (SF = 2048, ADC CLK =2.5MHz, Output data rate: 25Hz)

    Regards

    Michael

  • Hi Michael,

    It is possible that what you are reading may be noise external to the part. Can you try probing your inputs just to check if this is the case? Also, would it be possible for you to share your schematics?

    Regards,

    RC

  • Hi RC,

    Please find attached the schematic of the AD7730.

    Each part with a "nb" is not placed on the PCB for example (U141, C142, C143 etc.)

    The clock is  generated by the uC(dspic).

    I have checked the inputs by shorting them directly at pins 10/11. The behaviour did not improve.

    I would like to mention that we are using the ADC in SKIP and CHOP mode.

    Regards

    Michael

  • Hi Michael,

    The absolute voltage range of the analog inputs is restricted to between AGND + 1.2 V and AVDD -0.95 V. In your case when you shorted the inputs, this restriction is violated. What you can do is to connect the shorted inputs to an common-mode voltage range allowable for the part.  Based on you schematic, I would suggest you use R115 and R117 resistor divider to set the common-mode voltage for AIN1 +/- to within AGND + 1.2 V and AVDD - 0.95V.

    Regards,

    RC

  • Hi RC

    First I have to say thank you for the support.

    In my last message I forgot to mention that the pins were shorted on a common-mode voltage of +2.5V.

    But this was also not the problem.

    After spending a lot of time I finally got it.

    Befor a calibration I had to disable the CHOP-Mode of the AD converter.

    If I do the calibration as follows it works and I am getting the expected value(32768).

    1. Set the required SF value in the filter-register, and disable the CHOP-Mode.

    2. Set the required value in the DAC-register.

    3. Internal full-scale calibraton(+/- 80mV).

    4. Wait for the /RDY flag in the status-register.

    5. Internal zero-scale calibration(+/- 10mV).

    6. Wait for the /RDY flag in the status-register.

    The value I received is ~32720.

    This is realy colse to the expected value.

    Regards,

    Michael

  • This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

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    EZ Admin