No response from AD1556

Hi Divya,

Apologies for the delayed response.

The device operation can be controlled in two ways and the H//S pin is used to select which mode is used. When H//S pin is high, the state of the hardware pins sets the mode of operation, this makes the DIN pin is irrelevant. But when the H//S pin is low, a write sequence to the Configuration Register or a previous write sequence sets the device operation. A write operation to the device is initiated by setting the R//W low. With /CS pin low, the data on the DIN pin is automatically loaded to the Configuration Register on the falling edge of the SCLK with MSB loaded first as shown in Figure 6 of the datasheet. Table V shows the Configuration Register data bits.

To read from the device, R//W must be high. RSEL pin is used to select which register to be read. The Data Register is read when RSEL is high and the Status Register when low. With /CS pin low, the data from the Data Register or Status Register will be loaded to DOUT pin on the falling edge of the SCLK with MSB read first as shown in Figure 5 of the datasheet. By applying 24 SCLK cycles, you will be able to read the data on the Data or the Status register via DOUT pin.

Regards,

RC

Hi Divya,

Apologies for the delayed response.

The device operation can be controlled in two ways and the H//S pin is used to select which mode is used. When H//S pin is high, the state of the hardware pins sets the mode of operation, this makes the DIN pin is irrelevant. But when the H//S pin is low, a write sequence to the Configuration Register or a previous write sequence sets the device operation. A write operation to the device is initiated by setting the R//W low. With /CS pin low, the data on the DIN pin is automatically loaded to the Configuration Register on the falling edge of the SCLK with MSB loaded first as shown in Figure 6 of the datasheet. Table V shows the Configuration Register data bits.

To read from the device, R//W must be high. RSEL pin is used to select which register to be read. The Data Register is read when RSEL is high and the Status Register when low. With /CS pin low, the data from the Data Register or Status Register will be loaded to DOUT pin on the falling edge of the SCLK with MSB read first as shown in Figure 5 of the datasheet. By applying 24 SCLK cycles, you will be able to read the data on the Data or the Status register via DOUT pin.

Regards,

RC