AD7367 draws excessive current from AVCC/DVCC when VDD and VSS are missing

Hello all. I have the following issue with AD7367: The current consumption on any power line (Idd, Iss, Icc, Idrive) is as expected when all power supply voltages are at normal operating levels (i.e. VDD=13V, VSS=-13V, AVCC=DVCC=5V, VDRIVE=3.3V). However, when VDD & VSS are missing, Icc jumps to ~140mA (Icc returns to normal when VSS and VDD appear). This is not mentioned nor implied on "Table 6. Pin Function Descriptions" or "Table 5. Absolute Maximum Ratings" of the datasheet.

The difficulty in my application is that VSS voltage is derived by a separate power supply that ramps up approx. 0.5 sec after the ramping up of the other supply voltages. The resulting dissipation on the AVCC/DVCC, when VSS is missing, is 5V * 160mA = 0.8 Watt. It seems rather too high. So the question is: Is it normal to leave the application as it is, considering the small duration (0.5 sec) of this overcurrent situation, or should I have to modify the AVCC regulator so that it supplies AVCC/DVCC *after* the appearance of the VSS voltage?

NOTE: On the AD7367 evaluation board, the power sequence is controlled by an ADM1185 as following:




So it seems that I have correctly followed the eval. board scenario. But I'm getting this overcurrent issue!

Thank you in advance

  • After a more careful reading of the datasheet, I see that "Table 5. Absolute Maximum Ratings" probably hints to the cause of the problem: allowed voltage range for VDD  to AVCC is  "(VCC-0.3 V) to +16.5 V". So it seems that VDD must not be smaller than AVCC. A diode in series with the VDD line fixed the overcurrent problem.

  • 0
    •  Analog Employees 
    on Jun 15, 2016 5:41 PM over 4 years ago

    Hi jimpap,

         Good catch.

         The abs max rating table would also say the recommended power sequence of the product. Like in the AD7367 from the Table 5, it says that Vdrive to DGND is from -0.3 to DVcc. To power up correctly, DVcc must power up first before Vdrive and same goes with the Analog input voltage, that Vdd and Vss must be up prior to putting a volatge on the analog input pins.



  • 0
    •  Analog Employees 
    on Aug 2, 2018 3:29 PM over 2 years ago
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

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    EZ Admin