About Tr/Tf specified value of the AD7685

Hi, All.

We are a design using the AD7685.

To D / S Table 4. of the AD7685 does not have the provisions of the Rise / Fall time (Tr / Tf).

Please tell us about the specified value of the Tr / Tf.

The SPI Timing of such DAC There are provisions of the Tr / Tf.

Please refer the text below.


Best Regards,


  • 0
    •  Analog Employees 
    on Jul 19, 2016 1:05 AM

    Hi Laliberte,

      I am checking on this and get back to you.



  • 0
    •  Analog Employees 
    on Jul 25, 2016 9:39 PM

    Hi Laliberte,

    Jonathan and I looked into this.  We don't have a Tr/Tf specification for the AD7685 timing specifications.  The AD7685's timing specs are based off of trigger levels, 0.3xVIO for falling edge signals and 0.7xVIO for rising edge signals.  The timing spec values represent the time we guarantee for particular processes to occur after the digital input in question has reached either of those values.  These specifications are therefore "independent" of Tr and Tf (so long as the slew rate of digital line doesn't impact the system's ability to align with these specifications).

    It is still recommended that the digital signal paths be designed to allow for fast, clean edges/transients.

    Let us know if you need any more information for designing in the AD7685.