I am now using an AD7667 conversion chip, and I use the internal reference voltage, the parallel model, but my output has been FF7F, through inspection , I found that the internal reference voltage on the pin of REF is about 0.3V, this means there is something wrong with the internal reference voltage. But my PD, PDREF PDBUF is low, SER/PAR set to high (that is in parallel model), using the model of IMPULSE .
And after many inspections ,I am sure the circuit ,pin-strap，and the chip of AD7667 are all good.So what's the problem?
Thanks for your help
First, is the SER/nPAR signal set high or low? If it's high, as you stated above, the part would actually be set in serial mode and many of the data out pins would actually be set as configuration pins for the serial interface. I don't think this would solve the reference problem, but I wanted to make sure this wasn't a typo.
Second, are you sure it's the reference that's not working or is it the reference buffer? I think it's worth probing the REFBUFIN pin to see if it's also 0.3 V or if it's correctly sitting at 2.5 V. Also, is AVDD at 5 V? If the REFBUFIN pin is sitting at 2.5 V but REF is 0.3 V then that means there's something wrong with the reference buffer circuitry.
Also, what do you mean by "inspections?" Did these include continuity tests, etc. to ensure that the reference pins aren't being loaded down by something?
Let's start with that for now. Hopefully your measurements will give us more insight into the problem.
Tank your help, Tyler. I want to say that I am a beginner in this field ,and I am not good at English,so you may not quite understand what I have said .It made you in a trouble.I am deeply sorry for this.
Then first I also want to say sorry ,because I set SER/nPAR signal is low,but i write wrong.
Second ,I measured it again as you said , I am sure the REFBUFIN is sitting 0.00V and the REF is sitting 0.559V . The AVDD ,DVDD and OVDD are at 5V! However , I don't think the chip have problem.Because , I have used three AD7667s,and they all have this problem. My cricuit diagram is as follows：
Tyler,please help me,thanks.
No need to apologize, there are a lot of settings to keep track of.
It doesn't make sense that the REFBUFIN pin would be at 0V if PDREF is indeed low. Were all three of the AD7667 devices tested in the same socket? Or were they on different boards? If you have multiple boards, it would be good to know if the error persists between all of them to ensure that it's a design-related error. One quick sanity check would be to make sure the REFBUFIN pin hasn't shorted to ground somehow. Can you just do a quick continuity test to make sure this isn't the case?
Try that and let me know how it goes.
Firstly,there are only one board,and I only change the different AD7667s on a same circuit.So the first question that you said does not exist.
Secondly,I don't think and I am sure that the REFBUFIN pin hasn't shorted to ground,because,the PCB of the board is not wrong,and the ceramic capacitor that connected REFBUFIN pin has been changed a new one.It doesn't work.
So,Tyler,do you think there are other reasons for this problem.
Thank you !
Okay, well if you're confident that the board and components are not the issue, there are a couple more things you can try to get closer to the answer. The REF and REFBUF are only influenced by the components connected to their respective output pins and the logic pins PDREF and PDBUF.
The first I can think of is to replace those 10k pull down resistors with shorts to ground to force that node to always be 0V. I have no reason to believe your current scheme wouldn't be doing this, but at the very least it will rule this out.
Another approach would be to set PDREF high to power down the reference and drive REFBUFIN with an external source. Try driving the pin to 1.2 V. Make sure PDREF is high when you do this though to ensure the reference is shut down. This can also be done to the reference buffer output by shutting down the reference buffer (PDBUF set high) and driving the REF pin to 2.5 V. See if you can get any performance under these conditions.