Questions about AD7172/5/7-2

Hello,

7. Actually you can derive the equation that you are asking from the above equation. But first, I would like you to understand how the calibration coefficients affects the conversion results. Sorry for not giving a detailed explanation regarding the formula above. But the signal flow can be viewed as

[Input Signal] -> [PGA] -> [Attenuation by 0.75] -> [ADC Conversion] -> [Subtract Offset] -> [Scale by FS/0x400000] -> [Data Register].

This shows that 1 LSB of the offset register is equivalent to approximately 1.3 LSB of the data register, assuming the nominal full-scale coefficients are present. The exact value varies slightly from part to part, and the ratio changes if the
full-scale register coefficients are modified. The exact ratio can be derived by dividing the value in the full-scale register by 0x400000. This gives a value close to 1.33 with the nominal full-scale coefficient of 0x555555. But if the full-scale register is modified by the user, the ratio changes. This occurs since the offset removal is performed before the gain scaling when the ADC is adjusting the converter output. The full-scale register can be interpreted as a multiplication factor, whose value equals (full-scale coefficient/0x400000.) Since the scaling is done after the offset register is removed, the relative weight of an offset register LSB is different to a data register LSB. The nominal value of 1.3 for the gain scaling is because the input signal is  attenuated by 3/4 as part of the ADC conversion. A 4/3 scaling is then required to digitally compensate for this. (This is normally transparent to the user; it’s only when manipulating calibration values that this can become apparent.)

So for example, you have a known offset voltage and you want to calculate the offset register for a given nominal full-scale coefficient of 0x555555. Let assume you have a known input voltage VIN, of course VREF is also given. Data value will be equal to expected output code without the offset error. So using the equation below you can now calculate the required offset register value to compensate for a known offset voltage.

For unipolar: Data= [((0.75*VIN/VREF)*(2^23))-(Offset-0x800000)]*[(Gain/0x400000)*2]

                     Offset = [((0.75*(VIN+offset voltage)/VREF)*(2^23))-((Data*0x400000)/(Gain*2))]-0x800000

Regarding the full-scale coefficient or full-scale calibrations, it is a simple scaling coefficient, so to increase the gain of the ADC by 10%, the full-scale coefficient needs to be increased by 10%.

8. For system calibration, like the data sheet mentioned it expect the system zero-scale (offset) and system full-scale (gain) voltages to be applied to the ADC pins. So for a system zero scale, usually the selected AIN+ and AIN- are shorted together and bias to a certain voltage which is usually midscale or half VREF. For a system full scale, the full scale voltage (i.e. VREF) is applied to the selected AIN+ and AIN- input pins.

10. No, In unipolar the output code is natural (straight) binary with a zero differential input resulting in a code of 00..00, a midscale of 100..000, and a full-scale of 111...111.

Thanks,

Jellenie

Hello,

7. Actually you can derive the equation that you are asking from the above equation. But first, I would like you to understand how the calibration coefficients affects the conversion results. Sorry for not giving a detailed explanation regarding the formula above. But the signal flow can be viewed as

[Input Signal] -> [PGA] -> [Attenuation by 0.75] -> [ADC Conversion] -> [Subtract Offset] -> [Scale by FS/0x400000] -> [Data Register].

This shows that 1 LSB of the offset register is equivalent to approximately 1.3 LSB of the data register, assuming the nominal full-scale coefficients are present. The exact value varies slightly from part to part, and the ratio changes if the
full-scale register coefficients are modified. The exact ratio can be derived by dividing the value in the full-scale register by 0x400000. This gives a value close to 1.33 with the nominal full-scale coefficient of 0x555555. But if the full-scale register is modified by the user, the ratio changes. This occurs since the offset removal is performed before the gain scaling when the ADC is adjusting the converter output. The full-scale register can be interpreted as a multiplication factor, whose value equals (full-scale coefficient/0x400000.) Since the scaling is done after the offset register is removed, the relative weight of an offset register LSB is different to a data register LSB. The nominal value of 1.3 for the gain scaling is because the input signal is  attenuated by 3/4 as part of the ADC conversion. A 4/3 scaling is then required to digitally compensate for this. (This is normally transparent to the user; it’s only when manipulating calibration values that this can become apparent.)

So for example, you have a known offset voltage and you want to calculate the offset register for a given nominal full-scale coefficient of 0x555555. Let assume you have a known input voltage VIN, of course VREF is also given. Data value will be equal to expected output code without the offset error. So using the equation below you can now calculate the required offset register value to compensate for a known offset voltage.

For unipolar: Data= [((0.75*VIN/VREF)*(2^23))-(Offset-0x800000)]*[(Gain/0x400000)*2]

                     Offset = [((0.75*(VIN+offset voltage)/VREF)*(2^23))-((Data*0x400000)/(Gain*2))]-0x800000

Regarding the full-scale coefficient or full-scale calibrations, it is a simple scaling coefficient, so to increase the gain of the ADC by 10%, the full-scale coefficient needs to be increased by 10%.

8. For system calibration, like the data sheet mentioned it expect the system zero-scale (offset) and system full-scale (gain) voltages to be applied to the ADC pins. So for a system zero scale, usually the selected AIN+ and AIN- are shorted together and bias to a certain voltage which is usually midscale or half VREF. For a system full scale, the full scale voltage (i.e. VREF) is applied to the selected AIN+ and AIN- input pins.

10. No, In unipolar the output code is natural (straight) binary with a zero differential input resulting in a code of 00..00, a midscale of 100..000, and a full-scale of 111...111.

Thanks,

Jellenie