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1. May the inputs be shared between the channels? E. g if Ain0 and Ain1 set up for differntial measurement on channel 0, may the Ain1 be used for single ended measurement on channel 1?
2. I am a bit confused about dat rate and channels. if the data rate is 100 SPS, would it mean 50 SPS effective rate with 2 channels?
3. For the reason of simplicity the ADC is to be used to measure following signals with full scale voltages:
1.  +/- 1 V bipolar differential signal. (eg channel 0)
2. 5 V unipolar pseudodifferintal (channel 1)

The b) forces to use 5 V external refernce, which is disadvantageous for measurement on channel 1. Luckily, the ADC has inetrnal 2.5 V reference, which could be used on channel 1 to bring it closer to optimum range. Would it make sense to do so?

I may have further questions as I move on with the programming.

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• Hi,

7. The following equations show the calculations used in each calibration mode. The ideal relationship that is not taking account the ADC gain error and offset errors are as follows:

For unipolar: Data= [((0.75*VIN/VREF)*(2^23))-(Offset-0x800000)]*[(Gain/0x400000)*2]

For bipolar: Data= [((0.75*VIN/VREF)*(2^23))-(Offset-0x800000)]*[(Gain/0x400000)+0x800000]

These are shown on page 40 of  AD7172-2 datasheet. Please refer to it for further discussion.

8. In internal-calibration mode, the ADC determines the calibration points (gain and offset) internal to the ADC, thus you don't need to apply any external inputs as the calibration occurs internally. At internal offset, the selected positive analog input pin is disconnected, and both modulator inputs are connected internally to the selected negative analog input pin.

On the other hand, the system calibration allows the converter to compensate for external system gain and offset errors, as well as its own internal errors. Thus, it expect the system zero-scale (offset) and system full-scale (gain) voltages to be applied to the ADC pins. From an operational point of view, treat a calibration like another ADC conversion. An offset calibration, if required, must always be performed before a full-scale calibration.

To start a calibration, write the relevant value to the mode bits in the ADC mode register. The DOUT/RDY pin and the RDY bit in the status register go high when the calibration initiates. When the calibration is complete, the contents of the corresponding offset or gain register are updated, the RDY bit in the status register is reset, the DOUT/RDY pin returns low (if CS is low), and the AD7172x reverts to standby mode.

9. This (AVdd-AVss)/5 feature is used to monitor the supply voltage. For this feature to work on the AD717x the user needs to ensure that the analog input buffers are enabled and that +/-(AVdd-AVss)/5  inputs are selected together.

10. The number of effective resolution will depends on the selected output data rate and filter used. Please refer to table 20-24 of AD7172-2 datasheet.

Thanks,

Jellenie

• Hi,

7. The following equations show the calculations used in each calibration mode. The ideal relationship that is not taking account the ADC gain error and offset errors are as follows:

For unipolar: Data= [((0.75*VIN/VREF)*(2^23))-(Offset-0x800000)]*[(Gain/0x400000)*2]

For bipolar: Data= [((0.75*VIN/VREF)*(2^23))-(Offset-0x800000)]*[(Gain/0x400000)+0x800000]

These are shown on page 40 of  AD7172-2 datasheet. Please refer to it for further discussion.

8. In internal-calibration mode, the ADC determines the calibration points (gain and offset) internal to the ADC, thus you don't need to apply any external inputs as the calibration occurs internally. At internal offset, the selected positive analog input pin is disconnected, and both modulator inputs are connected internally to the selected negative analog input pin.

On the other hand, the system calibration allows the converter to compensate for external system gain and offset errors, as well as its own internal errors. Thus, it expect the system zero-scale (offset) and system full-scale (gain) voltages to be applied to the ADC pins. From an operational point of view, treat a calibration like another ADC conversion. An offset calibration, if required, must always be performed before a full-scale calibration.

To start a calibration, write the relevant value to the mode bits in the ADC mode register. The DOUT/RDY pin and the RDY bit in the status register go high when the calibration initiates. When the calibration is complete, the contents of the corresponding offset or gain register are updated, the RDY bit in the status register is reset, the DOUT/RDY pin returns low (if CS is low), and the AD7172x reverts to standby mode.

9. This (AVdd-AVss)/5 feature is used to monitor the supply voltage. For this feature to work on the AD717x the user needs to ensure that the analog input buffers are enabled and that +/-(AVdd-AVss)/5  inputs are selected together.

10. The number of effective resolution will depends on the selected output data rate and filter used. Please refer to table 20-24 of AD7172-2 datasheet.

Thanks,

Jellenie

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