I am diagnosing noise on a legacy design that has an AD7862 ADC. Typical signal is 2 to 5 Hz sinusoid. Sample rate is ca 7500 Hz. Problem is that converted digital signal is affected by at least +/- 5% by the sample rate. If I do an FFT I see the sinusoid peak and I see the 7500 peak about 20% of the former's magnitude. Otherwise very clean. ADC has 100 nF cer bypass cap to Vcc. Vref has 100 nF to ground. Vb1 = Vb2 = AGnd. /CS = AO = DGnd. Not sure what is wrong with this setup, but the noise is unacceptable.