AD7091R-4 Malfunctioning

Hi,

 

I am validating a design using a AD7091R-4 ADC and some errors are coming up. This component has been used in 12 boards, and all 12 of them are showing the same problem. Might it be due to a faulty batch?

 

When the system is turned ON it might happen that the ADC works correctly or it starts outputting wrong values and transitioning to wrong channels, and won't stop failing, this error sometimes is fixed when rebooted.

 

The ADC is routed as shown below, and when is working properly outputs the data shown in the next figure. Which correspond to the ADC working in normal operation, with channels 0,1 & 2 selected, followed by the value of configuration and channel registers.

When it boots failing, the output is as shown below . Sometimes the channel sequence is correct , but the values never are in all three. The value is allways right in channel 0 (reference voltage), and sometimes in channel 2, but hardly ever in channel 1. Even the configuration and channel registers output a wrong value sometimes.

A SW reset is performed at boot time with 66 convst pulses,  then write in every register, set the sw reset bit, and then read all the registers (shown below).

Any ideas why it might show this behaviour? 

Thank you in advance

  • Hello all,

    I'm heaving a very similar issue to this and our schematic is almost the same:

    After power up I make 66 CONVST pulses:

    Then I read the registers and get those values:

    Then I configure the ADC and readout:

    Now if I try to sample the ADC I only get zero on all channels:

    So I started to probe around and figured out if I probed the RESET pin during power up everything starts working!!!

    When I probe the RESET pin I see the following waveform:

    To me this looks like pretty crappy reset signal and the chip is possibly coming correctly out of reset due to the extra capacitance on the probes...

    From the datasheet we have the following recommendation:

    In no Figure in the document is this described any further....

    So my question is.  What size of Pull-Up resistor does Analog Devices recommend?

    Best regards

    Stefan

    btw we are using a FPGA to read from the chip and we prefer not to use a specific pin for the ADC reset...

  • Hi again,

    I did try to replace the pull up with 1K, 100k or Directly to VDRIVE, but still have the issue.

    Sometimes the ADC works after power up, sometimes not...  If it works then I need to touch the RESET line and then it works.  How ever it never works to send 66 pull down pulses of CONVST to reset it.  I did try to send 67 pulse and still the same.  My pulses are ~124ns 2.9us apart

    Best regards

    Stefan

  • 0
    •  Analog Employees 
    on Sep 27, 2017 6:31 AM

    Hi Stefan,

    I don't think the value of pull up resistor will matters, you can actually tied to Vdrive. It looks like, to me some  issue on your  VDD/Vdrive decoupling or load strength. Great if can post some scope-shot on VDD with CONVST as seen on figure53. Please take note on the reset-delay. Please let me know how it works.

    regards,

    LLoben

  • Hello

    I have the exact same issue as Stefan. Sometimes the ADC initializes correctly and works without issues, but sometimes it gives some faulty conversion results.

    So I took some pictures of VDD and Vdrive, like you mentioned.

    I use the AD7091R8.

    Note that the delay between Vdd going high and the CONVSTn pulses is around 1 second. As my first attempt to fix the issue, was to increase the reset-delay.

    In Yellow is the VDD and in Blue the CONVST signal.

    The pictures show both signals during

    Reset using CONVSTn and Powerup 

    Thank you,

    Clemens

  • Hi, Just to sync up.

    I have placed a 100nF cap on the reset line and 100k to VDRIVE.  This delays the rise time of the RESET line.  So far I have not had any more issue at startup.

    Best regards

    Stefan