AD7608 Spi with microcontroller

Hello,

I have some questions about the ad7608 18 bit converter SPI interface :

- From what I understood reading the datasheet, the SCLK digital input (spi master clock) frequency is ajustable by providing Vdrive, is this right ?

- if so, I see 4 possibles values for sclk frequency : 23,5Mhz, 17Mhz, 14.5Mhz and 11.5Mhz : I cant find any information if those are exact frequency sclk signal must reach or the maximum frequency allowed for sclk ? I assume it's max but i am not sure...

- if it is a max frequency, no problem. If not, as I wont be able to reach perfectly those frequencies with my microcontroller clock prescaler, what is a "close enough" frequency ? (I can reach 11.428, close to 11.5 ..)

-  my microcontroller  (TMS5701224) SPI module can read words which length is 16 bits max. The adc provides 18 bits data. Is that ok to configure the microcontroller with 9bits word length and to proceed like : set SS active (low logical), read 9 bits, set SS inactive, reset SS active, read the 9 bits lefts and so on... ? If not, would you have any idea of how should I proceed ?

- fourth and last question : From the datasheet, I understood that I can use only the DoutA line, and reading it 8 times will give me the 8  18 bits data values for each channel, is this right ?

Thanks a lot to any one who could help me !

Regardly,

Audry

  • 0
    •  Analog Employees 
    on Jul 6, 2017 2:06 AM

    Hi Audy,

       The different SCLK frequencies are maximum frequency for a given Vdrive level. You can use SCLK frequency below this values.

       The AD7608 requires a 18 sclk cycles and CS to frame the data of each channel. Based form your description, you mean, the CS (SS) will go low for 9 clock cycles and have the pin inactive? When the SS is inactive does this goes low? Just want to get a picture of the digital signals.

       On the last question, the data can be clock out on both DoutA and Dout B. The first data that clocks out on DoutA are from channels V1 to V4 and for DoutB are from V5 to V8. This requires 72 SCLK cycles. Each DoutA and DoutB can output the conversion result of all 8 channels but  requires 144 SCLK cycles. DoutA would have conversion results from V1,v2,v3,v4,v5,v6,v7,v8 while DoutB will have a sequence of conversion result from  v5,v6,v7,v8 ,V1,v2,v3,v4.

    Regards,

    Jonathan

  • Hello, thanks a lot for your answer !About the SS signal, here are some precisions on what I intend to do :1) when SS is set low, the corresponding slave is activated (standard spi protocol)2) as the microcontroller spi interface can manage 1-16 bits words communication, I was thinking on configure it for 9bits words, and make 2 communications for each channel on the adc, which means :-set SS low (activate slave)-spi interface get 9bits words- set SS high (desactivate slave)-do this one more time to get a full channel data

    Sincerely

    Audry

  • 0
    •  Analog Employees 
    on Jul 21, 2017 1:47 AM

    Hi Audry,

       I am still asking someone with what you are proposing to do.  But for the meantime,  I would like to ask if it is possible for the CS(SS) to hold low when reading the conversion result and then if the clock is only 16 cycles, then send another batch of SCLK cycles without pulling CS high. This would make ad7608 clock out the remaining data when another SCLK cycles is available.

    Regards,

    Jonathan

  • Hi again !

    So I achieved to communicate with my ad7608 and my controller !

    But i still have some issues : the value I get for positive voltage  (my range is +-10V) seems corrects as a simple formule give me thé correct voltage. But for negative voltage, they age impossible to understand. Searching on the web I found out that I could miss the MSB if the spi clck edge which  just follows CS activation is not a falling edge... however, ad7608 is supposed To clock out data on rising edge according to datasheet ? This could explain why I get correct positives value (msb = sign bit = 0 for positives numbers), and cant relate negatives ones  (msb = 1 but I miss it so it is  0, and as data age two complement coded, interprate it as positive number give strange results)

    I'll have a try soon, but I would appreciate any information about this, and how can I read my real values if i cant configure the spi communication this specific way?

  • 0
    •  Analog Employees 
    on Sep 24, 2017 7:20 PM

    Hi,

       You can read AD7608 Conversion result using two Dout lines, it needs more SCLK cycles. The CS must be held low for 72 SCLK cycles. On the AD7608, when CS goes low, the Dout pins is out of the three state and clocks out the MSB result. Please take note of T18, the delay after realeasing Dout from three state. You can make adjustments, since the AD7608 clocks out data on the rising edge of SCLK, your microcontroller should start reading on the falling edge, this make sure the data already settled on its value.

    Regards,

    Jonathan