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# AD 7822 Confusing ~PD and ~CONVST

Good day everyone!

I'm about to use AD 7822 but as I read the datasheet, I got confused regarding the ~PD and ~CONVST. The AD 7822 powers up (getting ready) if ~PD is logic high OR ~CONVST is logic high (after #ns of ~EOC duration). The word OR here confuses me.

1) If I tied ~PD permanently high to Vcc, does that mean the AD 7822 will not power down at all even if after ~EOC, ~CONVST is low? Is the state of ~CONVST ignored regarding power down if ~PD is always high?

2) Does that mean that a 1µs power up time will always be needed before every conversion start even if ~PD is tied to Vcc?

3) Can I use a continuous crystal oscillator (50/50) for ~CONVST, or does ~CONVST just accepts pulses or "per request" conversion? If yes, does that mean frequency of ~CONVST and sampling frequency is equal?

I've wanted to use 7822 with a continuous crystal oscillator for clock (50% duty cycle) and I am trying to compute for the frequency to achieve a little more than 1.5MSPS (my signal is 750kHz). I need a continuous ADC and the 1µs power up time (if it powered down during the signal) will mean that AD 7822 is not for the job.

Thank you very much.

ps. I will use ad 7822 with arduino.

Parents
• An out of the market 50% duty crystal standard frequency is 1.8432 MHz (period of 543 ns). I just hope that my 7822 will not max out that 420ns conversion time. Given the period of the crystal max conversion time should be 403 ns to have a continuous sampling.
I can't find in the datasheet a parameter that affects conversion time.  I'm assuming temperature and analog voltage.

Anyways, maraming salamat!