Any changes in AD7367 dual power supply?

Hi Elkarro,

  I have send a message to your email.

Regards,

Jonathan

Hi .. what was the outcome of this?  I think I am suffering from the same problem

I have the AD configured as +/-5V but the data appears to be wrapping at +/-2.5V

cheers,

Andrew

Hi, there was an initial misunderstanding between AD7367 and AD7367-5. Which one do you use?

I'm using AD7367-5 configured as +/-5V (see attached figure) and I confirm it wraps at +/-2.5V.

I've only could take note of it, then keep the input signals within that range.

Datasheet appears to be wrong.

Cheers

I must admit that, looking at the datasheets, I can't see any difference between the AD7367 and the AD7367-5 part beyond the sample rates (500kSPS for the 7367-5 & 1MSPS for the 7367).

I'm using the 7367 in a configuration very similar to yours, but with a 2.5V external Vref.

To be clear: I'm not seeing saturation at +/-2.5V, I'm seeing wrapping

i.e:

It looks the same I used to see (9.60Vpk-pk wrapped sine at left, 4.20Vpk-pk regular sine at right):

The difference is that AD7367 needs min. +/-11.5V even for +/-5V analog input range (for AD7376-5 is min. +/-5V).
I guess the 1st has a different analog front end to reach the 1 MSPS.

ahhh .. I missed the VDD VSS delta
At any rate, I have +/-12V at those pins, so that should be okay.

I'm kind of glad that you're seeing the same thing when using the internal 2.5V reference though - that was going to be the next thing that I looked at.

I was worried that I was off by a bit in my parsing of the serial data ...  except that I correctly see the sign change around 0V, which indicates I'm at least seeing the Most Significant Bit correctly ..

It continues to be a mystery!

Could ADI either confirm that we are right (it implies an error in the datasheet), or highlight what we are doing wrong?

Thanks

Hi,

       I have checked the AD7367 but I didn't see it wrapped at 10Vpp set at +/-5V range. I'll set up the ad7367-5 next. Is it okay for you also to share the timing that you have? Was the setting for both the left and the right photos that you posted the same?

Regards,

Jonathan

Hi Jonathan, you have pvt about timings.

In my application, I interface AD7367-5 to a MCU with logic at +3.3V, so Vdrive is +3.3V.

DVcc (Digital Supply Voltage) is tied to AVcc (as suggested at page 9, table 6 of AD7367-5 rev. B datasheet) so it is 5V.

Now I'm having a doubt: in tab. 6, RANGE0/RANGE1/REFSEL are generically referred to "logic high" and "logic low", but does "logic high" mean Vdrive, or it means DVcc? (note that in fig. 20 at page 18, REFSEL is explicitly tied to Vdrive)

In your test, were you in the same condition of mine: DVcc = 5V, Vdrive = RANGE0 = REFSEL = 3.3V?

ahhh .. status update on my issue at least - problem resolved.

When I got a scope onto the SPI lines, I could see that I was missing the initial data bit.

Fixed the SPI configuration and viola!  All is well.

Thanks all,

Andrew