Sir, how are you ?
About the AD7328, where the DOUT frames ? Wich values to CPOL and CPHA ?
Thank you so much!
Miguel
AD7328
Production
The AD7328 is an 8-channel, 12-bit plus sign, successive approximation ADC designed on the iCMOS™ (industrial CMOS) process. iCMOS is a process combining...
Datasheet
AD7328 on Analog.com
Sir, how are you ?
About the AD7328, where the DOUT frames ? Wich values to CPOL and CPHA ?
Thank you so much!
Miguel
Hi Miguel,
The AD7328 clocks out the data on the SCLK falling edge. We want to make sure that the data has settled before the microcontroller reads it. After the data clocks out on the SCLK falling edge the next rising edge the microcontroller must sample. On your attached file, the SPI mode that sample on the rising edge are 0 and 3 but mode 3 is fitting.
Regards,
Jonathan
Hi Jonathan
Thanks to the feedback
Have you tested the MODE 3 to evaluate if works on AD7328 ?
Miguel