Post Go back to editing

the work mode of ad7492

according to the schematic of AD7492,The pin 11 of the chip is PS/FS,when the pin is high,the chip is in partial sleep mode,and when the pin is low,the chip is in full sleep mode,however,when the pin is impending,the chip is in normal mode?

  • Hi liufeng,


    AD7492 has two modes of operation depending on the state of the ~CONVST. In Mode 1, High-Speed Sampling, ~CONVST pulse is brought high before the end of conversion which is the falling edge of the BUSY. While in Mode 2, Partial or Full Sleep Mode, ~CONVST remains low until after the end of the conversion. At the falling edge of BUSY, the ~CONVST line has its status checked and, if low, the part enters a sleep mode. Type of sleep mode depends on PS/~FS. Please refer to Figure 20 and Figure 21 of the datasheet.




  • This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin