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AD7671 step

Hello 

I connected to input 0 V - code from AD7671 is 32463. It is fine. 

But when I repeat request the code is

32463 32591 32591 32463 32591  .... 

32591 - 32463  = 128  - Where is low signif. bits ?? 

I checked with serial and parallel data mode.

My parallel code is:

AD7671_CS_1;
AD7671_RD_1;


while(GPIO_ReadPin(28));//wait busy

AD7671_CS_0;
AD7671_RD_0;
AD7671_result = GpioDataRegs.GPBDAT.all;

AD7671_RD_1;
AD7671_CS_1;

//start conversion
AD7671_CNVST_1;
AD7671_CNVST_0;
AD7671_CNVST_1;

-------------------------------------

My serial code is 

AD7671_EXT_1;
AD7671_INVSCLK_0;
AD7671_RD_0;
AD7671_CS_1;
AD7671_SCLK_0;
AD7671_CNVST_1;

while(GPIO_ReadPin(28));//wait busy

AD7671_SCLK_0;
AD7671_SCLK_1;
AD7671_SCLK_0;

AD7671_CS_0;

d = 0;
for(j=0;j<16;j++)
{
AD7671_SCLK_1;

if(GpioDataRegs.GPBDAT.bit.GPIO56)//SDOUT
{
d |= (unsigned int)(1<<(15-j));

}
AD7671_SCLK_0;//D9

}

AD7671_result = d;

AD7671_CS_1;
//start conversion
AD7671_CNVST_0;
AD7671_CNVST_1;
AD7671_CNVST_0;

Parents
  • You mean that your output code is not stable and changing only on two results.

    + "is not stable" - this is not problem for me in this moment.

    'only two result" - yes, this is problem - 32591 - 32463  = 128 - the difference is bit 6 

    I expected to see values like this -  32591 32584 32468 32599 - with random component of error  of 1 or 2 LSB

    There are many possible cause when there is a noisy output or not stable output. On the ADC support circuitry, the reference is important that it should be stable. How did you have force 0V on the input.

    You can also try tying the analog input to ground and check of this will have stable conversion results.

    + I connected ADC input (with AD8021 buffer ) to AGND. 2.50 ref is OK

    If it is okay for you to share the schematics and scope shot so we can better understand the problem.

    + BUSY + MK SCLK

    Busy+ SDOUT

    schem is the same as in documentation. 2.5 V ref 

Reply
  • You mean that your output code is not stable and changing only on two results.

    + "is not stable" - this is not problem for me in this moment.

    'only two result" - yes, this is problem - 32591 - 32463  = 128 - the difference is bit 6 

    I expected to see values like this -  32591 32584 32468 32599 - with random component of error  of 1 or 2 LSB

    There are many possible cause when there is a noisy output or not stable output. On the ADC support circuitry, the reference is important that it should be stable. How did you have force 0V on the input.

    You can also try tying the analog input to ground and check of this will have stable conversion results.

    + I connected ADC input (with AD8021 buffer ) to AGND. 2.50 ref is OK

    If it is okay for you to share the schematics and scope shot so we can better understand the problem.

    + BUSY + MK SCLK

    Busy+ SDOUT

    schem is the same as in documentation. 2.5 V ref 

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