AD7671 step

Hi ruskuw,

   You mean that your output code is not stable and changing only on two results. There are many possible cause when there is a noisy output or not stable output. On the ADC support circuitry, the reference is important that it should be stable. How did you have force 0V on the input. You can also try tying the analog input to ground and check of this will have stable conversion results. If it is okay for you to share the schematics and scope shot so we can better understand the problem.

Regards,

Jonathan

You mean that your output code is not stable and changing only on two results.

+ "is not stable" - this is not problem for me in this moment.

'only two result" - yes, this is problem - 32591 - 32463  = 128 - the difference is bit 6 

I expected to see values like this -  32591 32584 32468 32599 - with random component of error  of 1 or 2 LSB

There are many possible cause when there is a noisy output or not stable output. On the ADC support circuitry, the reference is important that it should be stable. How did you have force 0V on the input.

You can also try tying the analog input to ground and check of this will have stable conversion results.

+ I connected ADC input (with AD8021 buffer ) to AGND. 2.50 ref is OK

If it is okay for you to share the schematics and scope shot so we can better understand the problem.

+ BUSY + MK SCLK

Busy+ SDOUT

schem is the same as in documentation. 2.5 V ref 

additionaly, I connected  DC generator (results via parallel interface)

LS bits from 0 to 5 is not working.... and always 001111

Hi ruskuw,

   Just a clarification, what was the result when the inputs were connected to ground? It should be all zeros when configured in twos compliment. What is your output coding, by the way, Straight binary or twos complement? Would You be able to try a full scale voltage in the analog input. and please share the data that you see.

Regards,

Jonathan