AD7765 128x Decimation Not Working

I have a board that is daisy chaining 4x AD7765's and have it happily working in DEC_RATE = 0 (256x), BUT I cannot get 128x to work correctly.

Q1: What level do I set DEC_RATE to 128x? Do I drive it high or set it floating?

Here is a trace of it running in 128x where I have driven DEC_RATE = high

The bottom 4 signals contain the 4 channels parallel data where the LS status byte is set to 98'h

From AD7765 data sheet:

4544.9716be987934bc7f0cdb10ee49eb7397.html

8713.9716be987934bc7f0cdb10ee49eb7397.html

FILTER-SETTLE = '1', DEC_RATE 1 = '1', Don't care = '1' = 98'h

So, the 4x ADC's appear to think they are in 128x decimation.

Q2: Why is the NFSO timing incorrect? (i.e. the same as 256x decimation) Unless I misunderstand, NFSO should be running at double the rate. (i.e. no gap between CH1-4 sample bursts)

Note: If I set DEC_RATE to float I get 90'h (i.e. Don't Care = '0')

Thanks for any help!

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    •  Analog Employees 
    on Aug 24, 2018 12:50 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin
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  • 0
    •  Analog Employees 
    on Aug 24, 2018 12:50 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin
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