AD4002 SDO contention

Hello,

I'm trying with AD4002 for 18-bit application, one feature mentioned in datasheet looks confusing to me:

"If multiple AD4002/AD4006/AD4010 devices are selected at the same time, the SDO output pin handles this contention without damage or induced latch-up."

does that mean the SDO is open-drain based, given pull-up resistor available for busy mode? How to detect such contention and correct those corrupted bits or even meta-stable ones? i.e., how should we use this feature, or rather be avoided anyway?

thanks,

David

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    •  Analog Employees 
    on Aug 2, 2018 4:02 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

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    •  Analog Employees 
    on Aug 2, 2018 4:02 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin
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