The AD7992 AD7993 AD7994 AD7997 AD7998 have a bit D3 in the Configuration Register defined as FLTR, with a vague description that this filters the I2C bus. What filtering does this bit enable? Where is this documented?
John,
The filter bit enable turns on internal schmitt triggers that reject glitches on the SDA and SCL lines. This is part of the I2C standard and they should be enabled if you are using the AD799x family with an I2C Master that is running in FAST mode. If you are using it with a MASTER that runs in STANDARD mode you can leave them disabled.
The glitch is specified in the I2C standard as follows.
Sorry for the poor quality but essentially glitches 50ns or NARROWER should be rejected in FAST mode.
John,
The filter bit enable turns on internal schmitt triggers that reject glitches on the SDA and SCL lines. This is part of the I2C standard and they should be enabled if you are using the AD799x family with an I2C Master that is running in FAST mode. If you are using it with a MASTER that runs in STANDARD mode you can leave them disabled.
The glitch is specified in the I2C standard as follows.
Sorry for the poor quality but essentially glitches 50ns or NARROWER should be rejected in FAST mode.
