About AD7658 Specifications

Hi all,

 

I use the AD7658 in Serial Mode(SER/PAR^/SEL = HIGH).

There are two questions about characteristics.

 

①Timing in Serial Read Operation

 

According to Figure 32, data is valid after the falling edge of SCLK.

This is specified as the minimum of t20.

 

It is difficult to acquire data in synchronization with the clock, so please tell me the maximum value of t20.

 

②Serial interface operation

 

DataSheet (Rev. D | page 25/32) has the following description:

>> After the rising edge of CONVST x,  the BUSY signal goes high to indicate that the conversion has  started.

 

However, the conversion does not start with CONVST (LOW → HIGH),

but the conversion starts with CONVST (LOW → HIGH → LOW → HIGH).

*See attached image

 

(1)CONVST (LOW → HIGH)

 

(2)CONVST (LOW → HIGH → LOW → HIGH)

 

This occurs during the first conversion after power-up.

In subsequent conversions, The conversion starts with CONVST (LOW → HIGH).

 

Thanks

 

Takahiro