I'm looking for a good general sigma delta ADC. This is for an internal project so what I would like to get out of this is learning how to design and use (firmware and any necessary dsp) to get a high resolution (18bit+) low frequency (1-10kSPS) sampled data. I will be sampling voltage dividers for power supplies. I have 5V, 3.3V and could generate another rail or high precision reference if necessary.
I've found the AD7124, but not sure if this is the best since you guys have so many high precision ADCs. I'd like the digital interface to be SPI, UART or could even be a 1 bit streaming sigma delta (I'm not sure if these are very useful), but I would like to stay away from I2C.
Any help is appreciated!
May I know more details about your application and system requirements?
What is the input voltage range and how many input channels? Does your system requires an internal PGA or any other building blocks of the AD7124? How about power requirements?
And what do you mean by sampling voltage divider? Are you planning to measure this and if yes may I know how will you connect this to ADC and what are the resistor values?
I believe that in terms of speed and performance, AD7124 could be suitable in your application. However, it can only operate up to 3.6V. If you want an ADC that could cater up to 5V you may consider using the AD717x series. However, it doesn't have an internal PGA or excitation current so it will be needed to add if necessary.
Thank you for the reply!
I have a lot of flexibility and this is really to prove out an R&D project. I have 3.3V and 5V available on the board. I currently don't know if I need to buffer the voltage dividers with an amp so as a starting point I was just going to connect a voltage divider to the inputs. We will have 4 rails we want to monitor. If there is a part that fits the general requirements with more than 4 inputs we could possibly use another 2, but the extra 2 aren't necessary. We could also put on more than one part.
The power consumption is not an issue so I don't care what that is. Because the ADC is connecting up to my FPGA 3.3V logic bank 3.3V would be ideal so I don't have to deal with level translation.
The resistors that make up the voltage divider will be on the order of 10k-100k so not overly large. I don't necessarily anticipate the need for an internal PGA or current/biasing outputs from the ADC as we won't be biasing a strain gauge or anything.
I have another question.
I noticed you gets sell sigma delta modulators, but very few of them. For general data acquisition like this is it better to go with the all in one SAR or sigma delta ADC all in one chips rather than the modulator? From what I've read it seems like the modulators are only if you need higher resolution in measurement which you accomplish by using your own DSP logic after the modulator?
Yes we have few sigma delta modulators available which are widely used in motor control/drive application where high signal integrity and galvanic isolation are required. That's why most of our sigma delta modulators have on-chip isolation. Sigma delta modulators are oversampled at a very high sampling rate and will output a 1 bit streams where in the average value of the input voltage is contained in the bit stream. So it is necessary to have a digital filter and decimation followed by the modulator to process the bit stream and produce the final output data. This can be implemented on an FPGA or a DSP and could be more complicated. Filter choice affects the filtering of quantization noise thus a higher order filter is more than sufficient to eliminate the modulator noise. Beyond filtering quantization noise, the digital filter can be used to trade off input bandwidth for lower noise. This is done by increasing the decimation rate.
AD7124 is a precision low bandwidth sigma delta ADC intended for dc application measurements. A sinc filter is used on these precision low bandwidth sigma delta ADCs as it has low latency or low settling time. Sinc type filter always provides this type of profile i.e. deep notches at the programmed output data rate with less attenuation at other frequencies. Target ODR will determine the required decimation rate. That's why most of our lower bandwidth sigma delta ADCs have on chip digital filter and decimation that is configurable via registers.
So I would say that it would really depend on your target application and system requirements whether what type of ADC will suit you. And from the details that you have mentioned above, I think you can consider using AD7175-8 or any AD717x series, it doesn't have internal PGA or other unnecessary building blocks mentioned above, and it also has a rail to rail input buffers that is needed for your high input resistance measurement.
Thank you for the help! The AD7175 sounds like a good choice for me so I will begin analysis and potentially implementing that into my design. Thanks for the detailed write up to help me further understand some of these concepts!