AD7276 Data Read

Hi,

I want to build a circuit like the one below. There is an analog output of transimpedance amplifier. The amplitude of signal is between 0-3.3V, and the pulse width 10 ns. I want to use this analog signal on ADC and comparator input. My goal is to get the maximum value of the analog signal.

This is my simulation result. The green signal is analog voltage and the blue signal is comparator output.

How can i read the maximum value of analog signal with using comparator output?  Is sample and hold ADC(AD7276) appropriate for this operation?

Does AD7276 captures input data value at falling edge of the CS or it take the value stored in input hold capacitor? According to my simulation, the analog data is about 0 volt at falling edge of the CS. So i am always going to get zero. How can i solve this problem?

Thanks for helps.



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[edited by: @skowalik at 3:00 PM (GMT 0) on 10 Jan 2020]
  • 0
    •  Analog Employees 
    on Jan 10, 2020 2:58 PM

    HRNTTK,

    The pulse width of your input signal makes this a very challenging problem and thus the AD7276 is probably NOT the correct part for this application as it probably does not have sufficient bandwidth for the app given how narrow your pulse is.   I think you would be better off looking at something like the LTC2315-12.

    However, it we assume for the moment that the AD7276 did have sufficient bandwidth and that you are using the comparator falling edge to drive CS then the problem would be that the converter does not capture the sampled voltage until such time as the pulse has already gone away.  Thus if you could retime the CS pulse to trigger of the rising edge of the comparator you would have a better chance of acquiring the peak of the signal.

    Again I'm making some assumptions about your circuit operation based on the limited information I have so if I've missed something let me know and we can continue to work the problem.

    Hope that helps

    Sean

  • Hello dear Sean,

    Thank you for your help. I want to give some information about my circuit. I have a narrow laser pulse(10-30 ns). I want to detect this signal and measure the maximum value. This is my simulation circuit.

    I analyzed LTC2315-12.And it is also falling edge triggered CS device. I think this ADC does not capture the maximum voltage at falling edge of the comparator output. Am i right?

    Thus if you could retime the CS pulse to trigger of the rising edge of the comparator you would have a better chance of acquiring the peak of the signal.

    How can i do this? Do i need to select an ADC triggered on the rising edge?

    If you want to find out anything about my circuit, let me know.

    Best regards.

    Harun

  • 0
    •  Analog Employees 
    on Jan 13, 2020 1:24 PM in reply to hrnttk

    Harun,

    My thoughts were that you could invert the pulse out of the comparator with a logic inverter, thus effectively making the rising edge of the pulse a falling edge (It would clean it up as well).  The only issue would be to find one with a short enough propagation delay to ensure you captured the peak of the pulse.

    Hope that clarification helps.

    Sean

  • Sean,

    I can invert the comparator output by changing the input polarity of comparator without using a logic inverter. 

    But I think there is another problem here. This is the timing diagram of LTC2315-12.

    According to diagram the CS signal must be low for proper conversion (tconv min. 160 ns). But my CS signal is low just about 10 ns. So the SDI channel shuts down before i get valid data. Am i right?How can i solve this problem?

    Best regards.

  • 0
    •  Analog Employees 
    on Jan 13, 2020 2:51 PM in reply to hrnttk

    Harun,

    Excellent point....I think I had simplified this in my head that you'd be going through a controller that would allow you to trigger the process and read back the data in one routine.   I had not considered the latency in attempting to drive CS through that process and you are probably going to need an external One-Shot device like a 74LS221 to generate your CS as well as trigger your processor SPI transaction.   At the end of your SPI transaction you'll then need to reset/Clear the One-Shot to allow you to take another capture.

    Sean