Post Go back to editing

FPGA design files for D2390A-A evaluation board and Arrow/Terasic SoCkit Cyclone V FPGA evaluation board

I am using the DC2390A-A evaluation board for the LTC2500-32 ADC with the Arrow/Terasic SoCkit Cyclone V FPGA evaluation board.  I cannot find the design files for the Arrow/Terasic SoCkit evaluation board for use with the DC2390A-A.  I am in need of the design files to program the Cyclone V FPGA of the SoCkit evaluation board so that I can evaluate the LTC2500-32 on the DC2390A-A evaluation board.

I can't even find the pinout information for the DC2390A-A evaluation board!  So at this point, the DC2390A-A evaluation board is useless.

Thank you for any assistance with this issue!

Parents Reply Children
  • Thank you!  Will you please also request the FPGA design files for the SoCkit / DC2390A-A union?  I will greatly benefit from them and understand that they are provided unsupported.

    Thanks again!

  • python.zipI have uploaded a zipped file that you should download, unzip and overwrite the Python directory in your LinearLab Tools directory with. This should fix your problem.

  • I unfortunately obtain the same error message.  Python cannot find the "dc2390" module.  Neither can I.

  • The updated file was renamed  to DC2390_full_datapath_test_oldclient.py

    You will find it in the new Python directory in the llt\app_examples\ltc2500_family directory.

  • It appears that some progress has been made.  I am able to successfully run script "DC2390_full_datapath_test_oldclient.py", but the outputs are not meaningful and the message "Address out of range. Must be less than 0x100000" frequently appears as shown in the attached screenshot.

  • Also, the majority of the other scripts included in the "\linear_lab_tools64\python\llt\app_examples\ltc2500_family" directory do not run, while the few that do successfully run do not output meaningful information.  I can provide the associated screenshots if they are useful on your end.

    Thank you for your continued support!

  • When running DC2390_full_datapath_test_oldclient.py do you have the DC2390 DAC outputs connected to the ADC inputs?

  • Yes, as per the DC2390A Demo Manual.  And all jumpers are at their default positions.

  • Attached is the full output from the "DC2390_full_datapath_test_oldclient.py" script.  As you can see, there are frequent "TIMED OUT!!" messages.

    Python 2.7.16 |Anaconda, Inc.| (default, Mar 14 2019, 15:42:17) [MSC v.1500 64 bit (AMD64)]
    Type "copyright", "credits" or "license" for more information.
    
    IPython 5.8.0 -- An enhanced Interactive Python.
    ?         -> Introduction and overview of IPython's features.
    %quickref -> Quick reference.
    help      -> Python's own help system.
    object?   -> Details about 'object', use 'object??' for extra details.
    
    runfile('D:/Program_Files/Analog Devices/linear_lab_tools64/python/llt/app_examples/ltc2500_family/DC2390_full_datapath_test_oldclient.py', args='192.168.1.6', wdir='D:/Program_Files/Analog Devices/linear_lab_tools64/python/llt/app_examples/ltc2500_family')
    Tuning Word:131072
    Starting client
    FPGA load type ID: 0001 - Expecting ABCD, make sure you know what you're doing!
    FPGA load revision: 0103 - Minimum is 1246, make sure you know what you're doing!
    Setting up system parameters.
    
    Okay, now lets blink some lights and run some tests!!
    Software immediate trigger...
    ready signal is 4
    After 0.0019998550415 Seconds...
    Starting address: 
    6924160
    Reading a block of less than 1M points
    Standard Deviation: 0.0
    D:/Program_Files/Analog Devices/linear_lab_tools64/python/llt/app_examples/ltc2500_family/DC2390_full_datapath_test_oldclient.py:172: RuntimeWarning: divide by zero encountered in log10
      fftdb = 20*np.log10(fftdata / 2.0**31)
    RMS voltage: 0.0
    Peak-to-Peak voltage: 0.0
    Software immediate trigger...
    ready signal is 0
    After 0.105000019073 Seconds...
    TIMED OUT!!
    Starting address: 
    7603828
    Reading a block of less than 1M points
    Software immediate trigger...
    D:/Program_Files/Analog Devices/linear_lab_tools64/python/llt/app_examples/ltc2500_family/DC2390_full_datapath_test_oldclient.py:197: RuntimeWarning: divide by zero encountered in log10
      fftdb = 20*np.log10(fftdata / 2.0**31)
    ready signal is 0
    After 0.103999853134 Seconds...
    TIMED OUT!!
    Starting address: 
    8284380
    Reading a block of less than 1M points
    Software immediate trigger...
    D:/Program_Files/Analog Devices/linear_lab_tools64/python/llt/app_examples/ltc2500_family/DC2390_full_datapath_test_oldclient.py:210: RuntimeWarning: divide by zero encountered in log10
      fftdb = 20*np.log10(fftdata / 2.0**31)
    ready signal is 0
    After 0.105000019073 Seconds...
    TIMED OUT!!
    Starting address: 
    8965876
    Reading a block of less than 1M points
    Software immediate trigger...
    ready signal is 4
    After 0.00200009346008 Seconds...
    TIMED OUT!!
    Starting address: 
    15889536
    Reading a block of less than 1M points
    Software immediate trigger...
    ready signal is 4
    After 0.0019998550415 Seconds...
    TIMED OUT!!
    Starting address: 
    22813972
    Reading a block of less than 1M points
    
    
    
    
    
    
    
    
    
    
    Writing downward ramp to LUT!
    1073741835
    Done writing to LUT! Hope it went okay!
    Test done! Enter "client.shutdown()" to shut down SoCkit board.

  • The output says that you have the wrong FPGA load type and load revision.

    Did you follow the attached instructions when writing the SD card?

    https://rocketboards.org/foswiki/view/Documentation/ArrowSoCKITEvaluationBoardLinuxGettingStarted