I plan to use the AD2S1210 to implement a generic resolver measurement solution.
My customer recommends support of a wide range of transformation ratios and exitation voltages.
Thus, I an in need of an input voltage scaling solution in case the signal from the resolver is larger than the AD2S1210 is capable to deal with.
I found an article that suggests the following solution:
What do you think about using a (dual) digital potentiometer as Ra?
Can you please post the original circuit article in this thread? I would like to read through the text to make sure I'm not misinterpreting the circuit diagram.
The one thing I would caution is that depending on the resolution/performance requirements for your system is that you are aware of both the tolerance and drift specifications for your selected components. Mismatched components can introduce error terms in your output which are position dependent and could complicate calibration/manufacturing. You may be better off having a range of standard components that you populate based on the resolver selection. By selecting components with a similar footprint you can choose the absolute, tolerance and drift values that best meet the application need.
Hope that helps.
here it is:
It's the "Analog Dialogue 48-03", March (2014).
You can also download it here:www.analog.com/.../precision-rtdc-measures-angular-position-and-velocity.pdf
according to equation (9) of the above posted document:
I came to the conculsion that a gain mismatch of 0.1% between the SIN and COS inputs will result in an error of app. 5LSB when running the AD2S1210 in 16 bit resolution.
Do you agree?
Yes I agree.
I wonder if there is any other kind of signal conditioning you would suggest for RDC applications that require software adjustable, wide range, voltage level adaption?
Apologies for not getting back to you sooner. I think the most obvious thing to be to be concerned with any time you are dealing with voltages outside the rails of an active component is the potential for an over voltage stress to cause damage to your device. However, this has been addressed fairly well in the circuit note and would not require software to adjust.
The only other option I can think of is the output excitation gain. In your set of resolvers the likelihood of encountering not only variable transformation ratios but also different excitation requirements will likely mean you need to change your excitation output gain as well to obtain optimal performance. I would take a look at circuit note CN0276 for the output buffer design.
thank you for your help.
Let me resume our talk to help others having the same question:
Using the signal conditioning approach shown in "Analog Dialogue 48-03", March (2014) with a dual potentiometer as RA is a possible way to achieve software adjustable input voltage ranges for SIN and COS inputs of the AD2S1210. It is critical that the dual potentiometer channel-to-channel resistance matching is as good as possible. A 0.1% missmatch would lead to an error of app. 5LSB when running the AD2S1210 with 16 bit resolution. Be aware that the AD2S1210 data sheet states an angular accuracy of +/-10 LSB for the device (A, C grade).By the way, offset errors are more disastrous than gain errors. 0.1% Offset error (4mV for an Full-Scale input signal into the AD2S1210) leads to app. 10 LSB positional error.
In addition, you suggest to implement a software adjustable excitation voltage swing, since resolvers can have very different excitation voltage swing requirements. CN0276 shows the output buffer design for the EXC outputs of the AD2S1210. Due to the differential nature of the excitation output, it is necessary to change the gain of two OP-Amps. Again, the gain matching between EXC+ and EXC- is important. A dual potentiometer with good channel matching is a feasible approach.