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The measured value of AD7606 is about 4 times the actual value

Hello,

We would like to use the AD7606 for voltage measurements (only use 4 channels, no oversampling, parallel interface mode), and control it by FPGA.

First time, I forgot to decouple so there is an interference on CONVST A/B, leading to wrong throughput rate. But I got the correct voltage values, so I think there is no problem in my ADC transfer program.

I modified my circuit so this time I get the correct sampling frequency(50k). And I use oscilloscope to confirm that BUSY(0), CS(1), RD(2), CONVST A/B(3), FRSTDATA(4), RESET(5), CLK(6), OS0(7), OS1(8), OS2(9) are correct.

 

But this time I got wrong voltage values. When the value is positive, the measured value is about 4.5 times the actual value. When the value is negative, the measured value is about 4 times the actual value.

For example, square wave with 1Vpp, I got -2.06 to 2.19. Square wave with 0.2Vpp+0.2Vdc, I got 0.47 to 1.34; Square wave with 0.2Vpp-0.4Vdc, I got -1.98 to -1.16.

I have no idea how to solve it, maybe there is another mistake in my circuit design. I need some advice, thanks a lot.

 

Other chip resistors are all 100Ω.

Thank you for your time.



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[edited by: Lluis at 9:25 AM (GMT 0) on 3 Oct 2019]
  • Hi TJT,

    Can you explain a little bit more on your application and case. You said when you had interferences on the CNVST line, your reading looked fine. But now with the proper CNVST signals you are seeing voltages gained up by four. Is this x4 repeatable and consistent?

    May I ask you a couple of questions just to make sure:

    1)Where is your CLK (6) signal from your scope going to?

    2)Have you verified with the DMM the actual voltage level at the input pin V1-V2..etc and to REFIN pin?

    3)Is S1 populated? Is the voltage level properly set on the range pin?

    If all the above are fine, would you mind sending a subset of raw data collected out of the ADC(DB15-B0) ?

    Regards,

    Lluis.

  • Yes, the x4 is repeatable and consistent.

    1) The CLK signal is the crystal frequency of FPGA board(50M), I just use it to make sure that other signals’ duration are correct.

    2) I find it really difficult to measure the voltage values at the pins. I tried several times and find there is no problem at V1-V8 pins but the voltage values at the REF SELECT and REFIN are changing and obviously wrong. At most times, the voltage of REF SELECT is 1.01V and the voltage of REFIN is 0.53V.

    Maybe it is because the welding is not strong enough, I will weld it again. Is there any other possible reason? Your advice may be useful.

    3) S1 is not populated, and the RANGE is 5V.

    Thanks again for your advice, it really helps me.