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Can we configure the AD7768-1 as an ADC with an adjustable sampling frequency?
Can we directly switch the sampling frequency of the chip through the program? I mean don't change the external hardware device. Simply use the FPGA to input a command to the ADC via SPI .Because I see that the AD7768-1 provides three power modes and kinds of modulator and filters.
There are 4 MCLK divide options that can be set via SPI which will directly change the sampling rate. The question is, do you want to change the sampling rate or the output data rate? The AD7768-1…
Yes, the AD7768-1 defaults to using low power mode, sinc5 filter, decimate by 32. You can see the default values in the register map section of the datasheet. The reset value shown for every register is the default value used upon powering up the device.
Thank you very much ！