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Can we configure the AD7768-1 as an ADC with an adjustable sampling frequency?
Can we directly switch the sampling frequency of the chip through the program? I mean don't change the external hardware device. Simply use the FPGA to input a command to the ADC via SPI .Because I see that the AD7768-1 provides three power modes and kinds of modulator and filters.
Thanks for your reply！
Some people wants me to use the AD7768-1 chip to make a collector that can select the sampling frequency.But I found that there is only a description of the ODR in the data sheet, not sampling frequency.So what is the correspondence between sampling frequency and ODR? if the requirement is that sampling frequency just be less than one-half of the ODR?
And another question i want to ask is that，if its make sense to do this in your opinion.？
Because I think that selecting the sampling frequency as a high frequency can still collect signals lower than the set frequency....
Thank you very much for helping me solve this problem！
Thank you very much for your answer！
There is another question I hope to get your help.
When we operat AD7768-1,if it works in the low power mode and using the sinc5 filter in the default?
And how can I find out the default state after the chip is powered on in the datasheet?
Thank you very much ！