I have a test board with the AD7938BCPZ-6 part. I have it set up in byte mode. I have an FPGA that controls the read, write and conversion control signals. Every read cycle returns all 1's on the databus. I am operating the device using a 3.3V supply. I am using the internal 2.5V reference. I am not using the sequencer function. In other words, I set the SHDW and SEQ bits to 2'b00. I always write the 3-bit address in the control register prior to doing conversions.I am setting it up for single ended mode. The analog input pins are driven from analog circuitry that ranges from 0 to 2.5V.
I can provide timing if needed.
I would appreciate your help.
The code I have is written in Verilog and running in a Xilinx Spartan 6 FPGA.
