AD4112: 4-20mA in existing 24V current loop possible?

Hello Engineers,

At a machine is a pressure sensor 4-20mA powered with 24V

and a SPS which reads the current of the sensor, so we have

to share the signal.

The goal is to integrate the AD4112 in the current loop.

Because of the 24V supply in the loop we cannot connect IINx- to GND.

Is it possible to use IINx+ and IINx- as a differential pair?

Unfortunately the EVAL-AD4112SDZ connects all IINx- directly to GND,

so we cannot test the AD4112 with this evaluation board in our environment.

Thank you for your help.

Joerg Wagner

  • 0
    •  Analog Employees 
    on Jan 29, 2019 10:17 AM

    Hi,Joerg.

    Yes on the evaluation board these pins are directly connected as this is intended to be connected to GND for return path current input (-0.5mA to +24mA). But it is possible to use this as differential or biased the IINx- at some point to lower the current across 50ohm, please take note of the Absolute Input Voltage specification for current pins which is: AVSS-0.05 to AVDD+0.05. The voltage on Iin+ or Iin- should not exceed these limits. You have mentioned that you cannot connect IINx- to GND, can you explain further why and if you could share us the schematic, it would be great. May I know also what is an SPS?

    Thanks,

    Jellenie

  • Hi Jellenie.

    Thank you for a quick answer.

    In your language it's called PLC (Programmable Logic Controller), i.e. Beckhoff, Siemens, etc..

    In this case there is no chance to connect at the low-side of the loop because it's happened in the SPS itself.

    We have to chain at the high-side. The current loop is powered with 24V,

    but the voltage at the shunt resistor would be less than 1.2V, which will meet the maximum input voltage of AD4112.

    (Total impedance is 5+50+5 Ohm for AD4112, not just 50 Ohm)

    Thank you for your help,

    Joerg

  • Hi, Jellenie.

    Thanks for the information, it's really helpful.

    We are facing a similar requirement: to acquisition  8 current loops separately from 24V system. Below is my circuit graph. Could you please give us some advice about this circuit? Is designing good and safe enough?

    Besides, since the IIN+ and IIN- comes from a 24V system, I think it is possible that the voltage on Iin+ or Iin-  exceed the limits of Absolute Input Voltage specification. Is there any suggestion to solve this problem?

    Furthermore, are there any other solutions that fit the requirements at the same time can scan date more than 10kSPS per channel?

    Thank you for your help.

    DS Li

  • 0
    •  Analog Employees 
    on Jun 1, 2020 12:45 AM in reply to DSLi

    Hi,

    As long as the voltage across the IN+/IN- pins do not exceed the allowable common mode voltage of -0.5V to AVDD, there shouldn't be an issue. May I know what is your maximum input current and input range?

    The allowable input current range of the AD4112 is -0.5mA to 24mA, the maximum absolute input voltage of AVDD is only possible if you biased IIN- so that the current through the resistor is less than 24mA. In terms of the schematic I would suggest to refer it to our Evaluation board circuit or our AN-1572 for a more robust solution. This application note is designed for harsh industrial environment and ensure that the circuit performance is not affected by RF disturbances and has sufficient immunity against ESD and EFT.

    In terms of the scan rate, the maximum scan rate for multiple channels enabled are 6.2ksps but it can operate up to 31.25ksp when converting on a single channel.  

    Thanks,

    Jellenie

  • Hi, Jellenie.

    I really appreciate your reply, that's helpful!

    Our input range is 4-20mA, and the maximum input current will less than 20mA. So no problem.

    We will think about the AN-1572 as the reference for robust concern and the info about the speed of  single channel is also useful which confirmed my guess. 

    Thanks and wish you keep safe! 

    DS Li