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AD7175-8 : settling time of single conversion mode

Hello ,

I have a question from our customer about settling time of AD7175-8.
The condition is followings,
 - Multiple Channels sampling
 - Number of channels to sample : 8 (Channel0~Channel7)
 - Single Conversion Mode
 - ODR = 125,000 (41.667) -> settling time is 24us from the table 19,20 in data sheet
 - Delay = 0
 - Digital filter : Sinc5+Sinc1

This customer expects that the /DRDY occur at 24us after sending 0x8010 to AD7175-8.
But the first /DRDY occur at 46us after command 0x8010.
And the second to eighth /ODR occur at 13us after command 0x8010.

I'm guessing that the 46us is include the time to start-up sigma-delta modulator from standby.
Then I would like to know about two points.

Q1. I would like to know the reason why the first /DRDY need 46us.

Q2. Why the second to eighth /DRDY are shorter than 24us ?

Customer wants to operate at 4kHz ODR with single conversion mode.
But it seems does not have a timing margin.


Best regards,
y-suzuki

Parents
  • Hi,

    In continuous conversion mode, the timing for the very first conversion will be 28us and 24us for succeeding channels. Since in single conversion mode, the part is placed in standby mode after the conversion is complete. So it needs to come out of standby to power up and settle. Thus, the timing for the very first conversion will take longer than that in continuous conversion mode, approximately 128 modulator clocks or about 16us extra. This is the reason why you are seeing around 46us. However, I am not sure yet why you are seeing 13us instead of 24us. Do you have a scope shot of your digital interface? If you could also send to us your register map settings, it would be great.

    Thanks,

    Jellenie

Reply
  • Hi,

    In continuous conversion mode, the timing for the very first conversion will be 28us and 24us for succeeding channels. Since in single conversion mode, the part is placed in standby mode after the conversion is complete. So it needs to come out of standby to power up and settle. Thus, the timing for the very first conversion will take longer than that in continuous conversion mode, approximately 128 modulator clocks or about 16us extra. This is the reason why you are seeing around 46us. However, I am not sure yet why you are seeing 13us instead of 24us. Do you have a scope shot of your digital interface? If you could also send to us your register map settings, it would be great.

    Thanks,

    Jellenie

Children
  • Hello Jellenie,

    Thank you for your prompt reply.

    > If you could also send to us your register map settings, it would be great.

    Yes, I'd like to confirm the register data.

    ODR and filter type may defferent from customer's information.

    Best regards,

    y-suzuki

  • Hello Jellenie,

    I got the register data.

    That are followings.

    0x01 (ADCMODE)     0x4010
    0x02 (IFMODE)          0x0000
    0x06 (GPIOCON)      0x0000
    0x10 (CH0)                0x8010
    0x11 (CH1)                0x8030
    0x12 (CH2)                0x8050
    0x13 (CH3)                0x8070
    0x14 (CH4)                0x8090
    0x15 (CH5)                0x80B0
    0x16 (CH6)                0x80D0
    0x17 (CH7)                0x80F0
    0x20 (SETUPCON0)   0x0C00
    0x28 (FILTCON0)        0x050

    Coulf you please check these data ?

    Best regards,

    y-suzuki

  • Hi,

    Can you confirm the FILTCON0 settings? Looks like it is not a valid value as you need to select a specific filter type. If you want ODR=125ksps with Sinc5+Sinc1 filter this should be 0x1. I would also suggest to enable the Data_Stat bit in the status register when multiple channels are enabled. I'm confused also about writing a command of 0x8010. What is this for? The customer should always need to start writing to communication register. So to initiate the single conversion mode, you have to write 0x01 then followed by the data to write to the ADCMODE register which is 0x4010 in this case. If the customer wants to monitor the start of conversion they can use the SYNC pin to inititate conversion.

    Thanks,

    Jellenie

  • ello Jellenie,

    > If you want ODR=125ksps with Sinc5+Sinc1 filter this should be 0x1.

    I understood the setting of  FILT0 as followings.
      desired condition: ODR=125ksps , select Sinc5+Sinc1 filter, disable enhansed filter
      ENHFILTEN0 : "0"
      ENHFILT0 : "101" (default)  <- not valid by "ENHFILTEN0"
      ORDER0 : "00"
      ODR0 : "00001"
    then the FILTCON0 register value is 0x0501
    Does it wrong value ?

    Best regards,

    y-suzuki

  • Hi,

    Yes, that's correct it should be 0x0501.

    Thanks,

    Jellenie