Answer: To ensure synchronization between multiple AD7124-4/AD7124-8 devices, the same master clock must be used for all devices. If the AD7124 internal clock has been used, then one ADC serves as the…
Answer: We share the DOUT and RDY pins to reduce the pin count. Sharing DOUT and RDY has some other benefits also. If isolation is used between the ADC and the uC, having a shared DOUT/RDY line reduces…
Answer: Yes, that should work Vbias can be brought out to AIN-. However, if there are large RC values connected to AIN- then AIN+ sees a filtered version of the bias voltage. The difference between the…
Answer: Yes, that should work and the number of AIN pins per sensors is minimized. However, sharing pins will add error to the overall conversion as there will be a voltage drop across the R of the RC…
Answer: For a system that uses multiple ADCs, the interface can be simplified by synching the devices. For example, configure one ADC as the master and configure the remaining ADCs as slaves. The clock…
Answer: For a system that requires multiple channels, one AD7124-8 can support up to 8 differential/15 single ended input channels and one AD7124-4 can support up to 4 differential/7 single ended input…
Question Please, could you clear if it is possible use the external reference in AD7124-4 (by pins AIN6 (REFIN2+) and AIN7 (REFIN2-)), And at the same time input differential signal, using AIN5 and AIN7…
Q. Is an IBIS model available for the AD7124-4?
A. There is an IBIS model available for the AD7124-4 that can be downloaded at the following link: http://www.analog.com/en/license/ibis-models?mediaPath…
A:
The user guide and schematics for the EVAL-AD7124-xASDZ are not yet available on the EVAL-AD7124-4ASDZ product page, as they are still in the process of being added. In the meantime, you can access…