between 200MHz and 400MHz. Maybe we will be happy if it work between 100MHz -
200 MHz. Is this possible? If yes, which converters are able to handle this non
uniform clock? What are the disadvantages?
This is possible and could be used when you have the waveform you would like to
digitize such that parts of the waveform that require greater timing resolution
get sampled at higher rate than parts of the waveform that have "less
information" hence can be sampled/digitized at lower rate. Since samples are
collected into a memory array, you would need to have time stamp also that
shows at what point the sample rate was changed (also taking into account the
pipeline latency of ADC).
You would need to select an ADC capable of at least 500 MSPS. The AD9434 would
be the only 12-bit ADC at 500 MSPS that could be suggested at this time.
However there is one concern -> the main problem with non-uniform sampling
would be for our converters that have a clock duty cycle stabilizer (DCS) that
cannot be disabled. The DCS on the AD9434 cannot be disabled therefore it has
to be discounted. There is another device which can support 500MSPS and the DCS
can be disabled -> AD9286, so this device could be suggested. Please note that
it is interleaved and 8-bit.