Locale Icon
English
  • Forums

    Popular Forums

    • LTspice
    • RF and Microwave
    • Video
    • Power Management
    • Precision ADCs
    • FPGA Reference Designs
    • Linux Software Drivers

    Product Forums

    • Amplifiers
    • Microcontrollers
    • Clock and Timing
    • Data Converters
    • Direct Digital Synthesis (DDS)
    • Energy Monitoring and Metering
    • Interface and Isolation
    • MEMS Inertial Sensors
    • Power Management
    • Processors and DSP
    • Switches/Multiplexers
    • Temperature Sensors
    • Voltage References
    View All

    Application Forums

    • A2B
    • Audio
    • Automated Test Equipment (ATE)
    • Condition-Based Monitoring
    • Depth, Perception & Ranging Technologies
    • Embedded Vision Sensing Library
    • Motor Control Hardware Platforms
    • Precision Technology Signal Chains Library
    • Video
    • Wireless Sensor Networks Reference Library

    Design Center Forums

    • ACE Evaluation Software
    • ADEF System Platforms
    • Design Tools and Calculators
    • FPGA Reference Designs
    • Linux Software Drivers
    • Microcontroller no-OS Drivers
    • Reference Designs
    • Signal Chain Power (SCP)
    • Software Interface Tools
    • System Demonstration Platform (SDP) Support
  • Learn

    Highlighted Webinar

    Upcoming Webinar: Simplify High-Accuracy Instrumentation Design with Latest Precision Data Converters

    Join us for an insightful webinar on how ADI’s Precision technology is transforming the landscape of high accuracy instrument design with cutting-edge...

    Places

    • ADI Education Home
    • ADI Webinars
    • GMSL U
    • StudentZone (Analog Dialogue)
    • Video Annex
    • Virtual Classroom

    Libraries

    • 3D ToF Depth Sensing Library
    • Continuous-Wave CMOS Time of Flight (TOF) Library
    • Embedded Vision Sensing Library
    • Gigabit Multimedia Serial Link (GMSL) Library
    • Optical Sensing Library
    • Precision Technology Signal Chains Library
    • Software Modules and SDKs Library
    • Supervisory Circuits Library
    • Wireless Sensor Networks Library

    Latest Webinars

    • Simplifying Connectivity - Remote Controlled (RC) Nodes in a Software Defined Vehicle (SDV)
    • Upcoming Webinar: Simplify High-Accuracy Instrumentation Design with Latest Precision Data Converters
    • Design High Performance Power Systems with Ultralow Noise Technology
    • µModule Solution for Intelligent Motion Control
    • Accelerating Embedded System Development with CodeFusion Studio™︎
    View All Webinars
  • Community Hub

    Challenge Yourself!

      KCC's Quizzes AQQ286 about Right Labels on the Right Boxes containing colored balls

      1. Quote of the week: "Knowledge is knowing a tomato is a fruit. Wisdom is not putting it in a fruit salad" - unknown Sources: commons.wikimedia...

    View All

    What's Brewing

      Quiz! Why a Hybrid Approach Works Blog and Test Your Knowledge

      Quiz! Understand ISO 26262 Compliance Test your knowledge with our quick quiz , based on the blog " Safety in Layers: Why a Hybrid Approach Works ...

    View All

    Places

    • Community Help
    • Logic Lounge
    • Super User Program

    Resources

    • EZ Code of Conduct
    • EZ How To Help Articles
    • Getting Started Guide
    • ADI: Words Matter
    • Community Help Videos
    View All
  • Blogs

    Highlighted Blogs

    Exploring DCM and CCM in SMPS: Part 1 of 6

    Power supplies are the unsung heroes of electronic devices, ensuring that they receive the precise, stable, and clean DC voltages they need to function...

     

    Let’s Take a Field-Bus Trip

    Let’s dive deep into what makes field buses unique compared to each other. Building on our previous blog post, What Makes Field Bus Communication Unique...

    Latest Blogs

    • Countable vs Non-countable Faults
    • Power Your Signal: DAS Networks Unleashed: Part 2 of 4
    • Combining Functional Safety and Availability Using Redundancy
    • Top 3 Engineering Blogs That Captivated Minds on EngineerZone
    • How to Generate a Custom Profile for Optimal System Performance
    Read All Blogs

    ADI Blogs

    • EZ Spotlight
    • The Engineering Mind
  • ContentZone

    Visit ContentZone

    ContentZone

    Technical articles. Blogs. Videos. Your ADI content, all in one place.

    View ContentZone

    Featured Content

    Featured Content Title

    Blurb About Content

    View Content By Industry

    • Aerospace and Defense Systems
    • Automotive Solutions
    • Consumer Technology Solutions
    • Data Center Solutions
    • Energy Solutions
    • Healthcare Solutions
    • Industrial Automation Technology Solutions
    • Instrumentation and Measurement Solutions
    • Intelligent Building Solutions
    • Internet of Things (IoT)
    • Wireless Communication Solutions

    View Content By Technology

    • A2B Audio Bus
    • ADI OtoSense Predictive Maintenance Solutions
    • Dynamic Speaker Management
    • Gallium Nitride (GaN) Technology
    • Gigabit Multimedia Serial Link (GMSL)
    • Industrial Vision
    • Power Solutions
    • Precision Technology
    • RF
    • Security Solutions
    • Sensor Interfaces
    • SmartMesh
  • Partners

    Partner Forums

    • Boston Engineering
    • PalmSens
    • Richardson RFPD
    • Tri-Star Design, Inc.

    Partner Libraries

    • Calian, Advanced Technologies Library
    • Clockworks Signal Processing Library
    • Colorado Engineering Inc. (DBA CAES AT&E) Library
    • Epiq Solutions Library
    • Fidus Library
    • VadaTech Library
    • Vanteon Library
    • X-Microwave Library
EngineerZone
EngineerZone
High-Speed DACs
  • Log In
  • User
  • Site
  • Search
OR
Ask a Question
High-Speed DACs
  • Data Converters
High-Speed DACs
Documents AD9739: May I leave SYNC_OUT and SYNC_IN pins unconnected?
  • Forums
  • File Uploads
  • FAQs/Docs
  • Members
  • Tags
  • More
  • Cancel
  • HIGH-SPEED DAC SUPPORT COMMUNITY
  • +Documents
  • +AD768ARZ: FAQ
  • +AD9102: FAQ
  • +AD9106: FAQ
  • +AD9115: FAQ
  • +AD9116: FAQ
  • +AD9117: FAQ
  • +AD9119: FAQ
  • +AD9122: FAQ
  • +AD9129: FAQ
  • +AD9135: FAQ
  • +AD9142A: FAQ
  • +AD9144: FAQ
  • +AD9146: FAQ
  • +AD9148: FAQ
  • +AD9286: FAQ
  • +AD9712: FAQ
  • +AD9716: FAQ
  • +AD9717: FAQ
  • +AD9726: FAQ
  • +AD9734: FAQ
  • +AD9736: FAQ
  • +AD9739: FAQ
  • -AD9739A: FAQ
    • AD9739/AD9739A Output Stage Routing
    • AD9739: FPGA selection
    • AD9739: IRQ clearance
    • AD9739: May I leave SYNC_OUT and SYNC_IN pins unconnected?
    • AD9739: multichip synchronization
    • AD9739A-FMC-EBZ with Zedboard
    • AD9739_AC coupling LVDS
    • AD9739_balun two sides
    • AD9739_CLK input model and little output power
    • AD9739_R2-EBZ DAC Output stage termination
    • Can fs/4 spurs be reduced or eliminated by factory calibration, or any other method, on the AD9739/AD9739A?
    • How accurate is the AD9739's output impedance of 70ohms?
  • +AD9742: FAQ
  • +AD9744: FAQ
  • +AD9747: FAQ
  • +AD9748: FAQ
  • +AD974: FAQ
  • +AD9763: FAQ
  • +AD9765: FAQ
  • +AD9767:FAQ
  • +AD976A: FAQ
  • +AD9774: FAQ
  • +AD9776: FAQ
  • +AD9777: FAQ
  • +AD9779: FAQ
  • +AD9779A: FAQ
  • +AD977: FAQ
  • +AD977A: FAQ
  • +AD9780: FAQ
  • +AD9783: FAQ
  • +AD9786: FAQ
  • +AD9788: FAQ
  • +AD9789: FAQ
  • +AD9161: FAQ
  • +AD9162: FAQ
  • +AD9164: FAQ
  • +AD9856: FAQ
  • +AD9857: FAQ
  • +AD9957: FAQ
  • +ADV7123: FAQ
  • +ADV7125: FAQ
  • +DPG3: FAQ
  • +MAX5189BEEI+: FAQ
  • +MAX5190BEEG+: FAQ
  • +MAX5868: FAQ
  • +MAX5871EXE+T: FAQ
  • +MAX5877EGK+D: FAQ
  • +MAX5880AUXF+: FAQ
  • +MAX5884EGM: FAQ
  • +MAX5891EGK+D: FAQ
  • +AD9136: FAQ
  • +AD9177: FAQ

AD9739: May I leave SYNC_OUT and SYNC_IN pins unconnected?

Question

I'm going to use two parts into a board, and the sampling clocks for both DACs
are sourced by the same clock distribution module. So the synchronization is
inherent to the system architecture as the sampling clocks
re synchronized. May I leave SYNC_OUT and SYNC_IN pins unconnected?

Answer

Synchronization of multiple AD9739’s imply that each of the DAC’s outputs are
time-aligned to the same phase when all devices are fed with the same data
pattern (with DCI) at the same instance of time(with phase aligned DACCLK
signals). The main contributor to phase ambiguity between devices is from the
Div-by-4 circuitry within the digital path of the LVDS Data Receiver and Data
Assembler (refer to figure 82). Upon power-up, the state of this internal
divider is unknown hence the need to employ a synchronization method that phase
aligns the digital paths of the AD9739 with respect to each other.
If this is not required, then one does not need to use the SYNC_IN and SYNC_OUT
pins.

Tags: high-speed dacs 3L1Z0729 ad9739
  • Share
  • History
  • Cancel
analog-devices logo

About Analog Devices

  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue

Get the Latest News

Stay up to date with our latest news and articles about Analog Devices' products, design tools, trainings, and events.

Sign Up Now
  • Instagram page
  • Twitter page
  • Linkedin page
  • Youtube page
  • Facebook
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings
沪ICP备09046653号-1

©2025 Analog Devices, Inc. All Rights Reserved

analog-devices

About Analog Devices

Down Up
  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

Down Up
  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue

Get the Latest News

Stay up to date with our latest news and articles about Analog Devices' products, design tools, trainings, and events.

Instagram page Facebook Twitter page Linkedin page Youtube page
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings
沪ICP备09046653号-1

©2025 Analog Devices, Inc. All Rights Reserved