> 1. Is it possible to clock the both DACs with different clocks like 33MHz and
66MHz? What influence does this have on the specs, especially for the matching
of the two channels when master/gain control mode with one resistor is used?
> 2. In the datasheet the schematic of the Eval-board is given. But the values
of the inductances (L1, L2) are missing. What do you recommend?
Q1. When the part is used in dual port mode, the AD9765 acts as two completely
independent DACs. You can run the two DACs at different clock frequencies. I am
waiting on feedback from the HSC group on how this will impact performance. I
would expect that there will be some cross talk between the two DACs but you
should still be able to achieve comparable dual and four Tone SFDR numbers
comparable to those given in the datasheet for both DACs. I would expect that
the majority of cross talk between channels measured in a system could be
attributed to PCB layout and design.
Operating the part in master/slave gain control mode should not have any effect
on the performance of the part. This resistor is only used to set up current
Q2. L1 and L2 are not inductors as such, they are ferrite beads used to filter
the power supply. Their exact value is not critical and will in fact depend on
the frequency content of your power supply. A few 10s of micro Henrys will
Some additional comments
" There should be no problem at all running the two DACs at
different speeds. With the exception of the internal reference,
all functions of the DACs (CLK, reference amplifier) are
independent of each other in dual DAC mode.
Concerning L1 and L2, the higher the inductance, the better.
Along with the bypass capacitors nearby, they form a lowpass
filter for the power line. The lower the cut-off frequency of
this filter, the better.