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Products Mentioned

AD9777 Production
The AD9777 is the 16-bit member of a new pin-compatible family of high-speed dual Interpolating TxDAC+® converters with a maximum input data rate of...
Datasheet
AD9777 on Analog.com

AD8345 Production
The AD8345 is a silicon RFIC quadrature modulator, designed for use from 140 MHz to 1000 MHz. The part provides a very low noise floor and high output...
Datasheet
AD8345 on Analog.com

Table of Contents
  • HIGH-SPEED DAC SUPPORT COMMUNITY
  • +Documents
  • +AD768ARZ: FAQ
  • +AD9102: FAQ
  • +AD9106: FAQ
  • +AD9115: FAQ
  • +AD9116: FAQ
  • +AD9117: FAQ
  • +AD9119: FAQ
  • +AD9122: FAQ
  • +AD9129: FAQ
  • +AD9135: FAQ
  • +AD9142A: FAQ
  • +AD9144: FAQ
  • +AD9146: FAQ
  • +AD9148: FAQ
  • +AD9286: FAQ
  • +AD9712: FAQ
  • +AD9716: FAQ
  • +AD9717: FAQ
  • +AD9726: FAQ
  • +AD9734: FAQ
  • +AD9736: FAQ
  • +AD9739: FAQ
  • +AD9739A: FAQ
  • +AD9742: FAQ
  • +AD9744: FAQ
  • +AD9747: FAQ
  • +AD9748: FAQ
  • +AD974: FAQ
  • +AD9763: FAQ
  • +AD9765: FAQ
  • +AD9767:FAQ
  • +AD976A: FAQ
  • +AD9774: FAQ
  • +AD9776: FAQ
  • -AD9777: FAQ
    • AD9777 / AD9779: The two channel DACs, can they be used separately?
    • AD9777 max speed and timing query (SR#: 1200982)
    • AD9777: DATACLK can only be output pin
    • AD9777: Modulating the bandwidth
    • What is the latency of the AD9777,5,3 DAC family?
  • +AD9779: FAQ
  • +AD9779A: FAQ
  • +AD977: FAQ
  • +AD977A: FAQ
  • +AD9780: FAQ
  • +AD9783: FAQ
  • +AD9786: FAQ
  • +AD9788: FAQ
  • +AD9789: FAQ
  • +AD9161: FAQ
  • +AD9162: FAQ
  • +AD9164: FAQ
  • +AD9856: FAQ
  • +AD9857: FAQ
  • +AD9957: FAQ
  • +ADV7123: FAQ
  • +ADV7125: FAQ
  • +DPG3: FAQ
  • +MAX5189BEEI+: FAQ
  • +MAX5190BEEG+: FAQ
  • +MAX5868: FAQ
  • +MAX5871EXE+T: FAQ
  • +MAX5877EGK+D: FAQ
  • +MAX5880AUXF+: FAQ
  • +MAX5884EGM: FAQ
  • +MAX5891EGK+D: FAQ
  • +AD9136: FAQ
  • +AD9177: FAQ

AD9777: Modulating the bandwidth

Question

I would like to know if is it possible to use AD9777's Direct-IF option so that
DAC signal output would be 100-120 MHz (communication signal bandwidth)? This
would be achieved by upconverting 30-50 MHz band with 70 MHz (Direct-IF?)
inside DAC. Now I'd like to feed this signal through AD8345 and upconvert it
thereby to 900-2820 MHz potential frequency output range. The uncertainty here
is, that I'm not sure if AD8345 is able to handle 100-120 MHz input (There was
80 MHz input bandwidth specified in the specs, but does this mean input
frequencies from 0 to 80 MHz?) Also I'd like to have or know the spectrum for
this 100-120 MHz DAC output, that the filter requirements could be optimised?
What is the settling time for AD8345 output when LO is changed from 250 to 1000
MHz in 150 ns?

Answer

Q1. Can the AD8345 handle a 100-120MHz input?
A1. No, the frequency response of the baseband input rolls off before then, as
shown in TPC2 on page 5 of the datasheet. This plot also shows that the
frequency response depends on the singal amplitude, indicating a slew rate
limitation. The 80MHz bandwidth spec means that frequencies from dc to around
80MHz are passed by the baseband input while frequencies >80MHz are attenuated.

Q2. What is the output spectrum of the 100MHz to 120MHz output from the DAC?
A1. Difficult answer to explain. Basically your filter should eliminate the
images caused by the DAC's analog output aliased with the DAC's sampling
frequency. The output should ideally consist of your input band of frequencies
(0 to 50MHz) translated up in frequency so that the frequency lies between
70MHz and 120MHz. In addition you will have an image band spreading
from fs - 120MHZ to fs -70MHz
and another band
from fs +70MHz to fs + 120MHz
and another band
from 2fs -120MHz to 2fs -70MHz
.

You filter has to pass 120MHz, but attenuate fs - 120MHz.

However the AD9777 has additional digital filtering to ease the anti-aliasing
filter requirements. The AD9777 datasheet contains an excellent explanation of
image rejection and complex modulation, from pg 30 on.

In addition our seminar on "High Speed Design Techniques" section 4 contains
valuable general material on sampled data systems.


Q3. Settling time of AD8345 output in response to a step change in LO
A3. Although the LO might be subject to a step change in frequency in the case
of an agile LO generator, we haven't characterised the settling time in
response to such a step change. I think it should be able to follow a 150ns
rise time, but I don't know what frequency artefacts might be produced by such
a sudden change. You might like to obtain samples/evaluation board ($99) for
the AD8345 and evaluate this aspect fo the devices performance yourself.

Tags: ad8345 Standard High Speed D/A Converters high-speed dacs I/Q Modulators High Speed D/A Converters =30MSPS I/Q Modulators and Demodulators 5DAY1844 ad9777 Show More
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