Propogation delay is dependent on mostly digital filter configuration since
each filter has its own group delay depending on #of taps (i.e. group delay=FIR
Taps/2) . The 1st stage filter dominates since it has the most filter taps and
runs at the input data rate. After the digital filter, the data will
experience around a 5 clock cycle delay (i.e. relative to DAC CLK) before
updating the TxDAC.
In terms of output settling time, the TxDAC core settles to 0.1% within 10
nsec. Note, since this device is used for frequency domain sort of applictions,
output settling time is not specified nor is an issue since a analog
bandlimiting filter follows the DAC which has even a greater settling time.