Question If I increase the output load resistors, what is the maximum output voltage that can be guaranteed? Answer IOUTFS is in the range of 2mA to 20mA and the voltage IOUTAx and IOUTBx needs to be kept within the compliance range -1.0V to +1.25V. Therewith the applied load needs to stay in range 1.25V/20mA to 1.25V/2mA = 62.5 Ohm to 625 Ohm. In this load range the part stays into specified output range, and 1.25V output can be delivered.

AD9767: Input timing for interleaved mode

Question This is to verify AD9767 functionality in interleave mode. Figure 27 on page 15 of Rev C datasheet contains interleave block diagram. Could you please confirm that Port1,2 input latches are NOT synchronized with IQCLK? Prior to starting my HW design, I need to be sure that data to the chip can be delivered to the input latches upon rising edge of IQWRT strobe signal with no clock support. Answer The block diagram clearly shows that IQWRT and IQSEL that control the port 0 and port 1 latches in interleaved mode. However there is some constraint on the timing of IQCLK with respect to IQWRT (because the port latches need sufficient time to aquire the input data and settle, in order that the DAC latches see stable data. This constraint is that you must drive an IQCLK rising edge before or simultaneously to the rising edge that you drive on IQWRT. Otherwise, the data clocked in on the previous IQWRT will not be reliably latched into the DAC latches. There follows a 2ns keep out window for the IQCLK rising edge during which data will not be reliably latched into the DAC latches. After this 2.0ns window, the next data will be latched into the DAC. This is explained in the "Dual port mode" timing section and shown in figure 25. The same restriction applies in interleaved mode and in Dual Port mode.

Question Can you tell me which pins are + and which are - on the two differential outputs. The AD9248 in our receivers has + and - indications on each input pin but the ADC just has A and B or 1 and 2 Answer For the AD9767 DAC outputs A is plus and B is minus.

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AD9767 Production
The AD9763/AD9765/AD9767 are dual-port, high speed, 2-channel, 10-/12-/14-bit CMOS DACs. Each part integrates two high quality TxDAC+Â® cores, a voltage...
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AD9767 on Analog.com