AD9129 - Clock source and buffer recommendation

Question What is a recommended clock source and buffer for RF DAC like AD9129? Answer The ADF4350 low phase noise/jitter PLL as a clock source can provide output frequencies from 140 MHz up to 4.4 GHz with jitter as low as 0.5 ps rms. A recommended clock buffer would be the ADCLK925 low-jitter clock buffer.

AD9129 - Highest RF output frequency spectrum supported

Question What is the highest RF output frequency spectrum supported by the AD9129 and AD9119 family? Answer Utilizing the Mix-Mode function, the AD9129 and AD9119 RF DACs can synthesize an RF output spectrum of up to 4.2 GHz.

AD9129 datasheet clarifications

Question We would like to use the schematic of the figure 154 (with TCI-1-13M+ as transformer) in mix and normal mode. We need clarifications about datasheet information elements. Only mix mode is indicated for this schematic in datasheet (http://www.analog.com/static/imported-files/data_sheets/AD9119_9129.pdf). Can you confirm that it is possible to use the schematic of figure 154 in normal mode? Can you confirm that all waves of the figure 155 are exclusively based on schematic of figure 154, based on TCI-1-13M+ as transformer? (Figure 152 is also indicated in paragraph…) Answer Yes, the transformer in the schematic in figure 154 works well in both Normal and Mix mode. Fdac_2.6Ghz_transformer_in_fig154.png : Frequency response of AD9119 in Normal mode at Fdac = 2.6Ghz using the transformer in figure 154. Fdac_2.6Ghz_transformer_in_fig152.png : Frequency response of AD9119 in Normal Mode at Fdac = 2.6Ghz using the transformer in figure 152.

Evalboards use DAC "N" output and the datasheet uses the DAC "P" output. Which is correct?

Question All your eval boards for the AD9129 (AD9129-EBZ, AD9129-MIX-EBZ and AD9129-CBLTX-EBZ connect the “N” output of the DAC to the signal which is the opposite output to that shown in the datasheet which uses the “P” output as per Figure 152 and 154? Are the Evalboards(non-inverting) or the schematic correct(inverting)? Answer It doesn’t matter which way you hook it up, since it is going differential-to-single-ended. We did it this way for convenience of layout. The data sheet and the schematic are both correct implementations.

AD9129 Analog Reference Plane

Question We are currently using AD9129 in one of our mixed signals designs and we are confused bout the refrence plane for the analog section.1/Should it be VSSC cince it's the analog return for the analog supply or VSSA as in the relative eval board.2/ the reason behind using VDDA as shield for the diff. RF out?? Answer 1/ VSSA is a -1.5V supply to the DAC core on the chip and VDDA is a +1.8V supply. Current runs through the DAC core current steering transistors fromVDDA to VSSA.2. 1/ VSSA is a -1.5V supply to the DAC core on the chip and VDDA is a +1.8V supply. Current runs through the DAC core current steering transistorsfrom VDDA to VSSA. The shield isolates the EVB RF output from noise sources on the board.

AD9129 - Compatible data generator ad9129

Question AD9129: Is there a data generator compatible with these devices? Answer Yes, ADI’s Data Pattern Generator (DPG) is a bench-top instrument for driving vectors into Analog Devices' high-speed Digital-to-Analog converters. The DPG connects to a PC over USB, and allows a user to download a vector from their PC into the DPG’s internal memory. Once downloaded, the vector can be streamed-out to the attached AD9129-EBZ evaluation board at the full data rate. This allows for rapid evaluation of the DAC with both generic and custom-generated test data.

AD9129 - Mix-Mode function

Question What is the Mix-Mode function of the AD9129 and AD9119? Answer Mix-Mode enhances the DAC output power in the 2nd and 3rd Nyquist zone thus increasing the usable output bandwidth of the device. In Mix-Mode the output is effectively chopped at the DAC sample rate which has the effect of reducing the power of the fundamental signal while increasing the power of the images centered around the DAC sample rate. This improves the dynamic range of these images. (See attachement)

AD9129 - Clock source and buffer recommendation

Q What is a recommended clock source and buffer for RF DAC like AD9129? A The ADF4350 low phase noise/jitter PLL as a clock source can provide output frequencies from 140 MHz up to 4.4 GHz with jitter as low as 0.5 ps rms. A recommended clock buffer would be the ADCLK925 low-jitter clock buffer.

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AD9129 Recommended for New Designs
The AD9119/AD9129 are high performance, 11-/14-bit RF digital-to-analog converters (DACs) supporting data rates up to 2.85 GSPS. The DAC core is based...
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AD9129 on Analog.com