Hi everybody,
I want to generate a low phase noise CW signal using the EVAL-AD9173-FMC-EBZ. To do this I want to feed a low noise RF signal from a RF signal generator to the DAC as an external Clock.
I'm using the DPGDownload and ACE Software to configure the FPGA and the DAC. I followed the example from https://wiki.analog.com/resources/eval/dpg/ad917x-fmc-ebz and modified it to generate a CW signal at 100 MHz.
In the data sheet it says, you can bypass the HMC7044 and directly feed a clock signal with a frequency between 2.91 and 12.6 GHz into the DAC using the SMA connector J34 on the DAC board.
In the ACE software I configured the AD9173 clock source to "Direct Clock (PLL OFF) and Direct Clock Source to "Exernal Clock(J34)". I matched the Input data rate with the one I'm using in DPGDownload app (491.52 MHz) in Dual Link Mode, JESD Mode 4, Channel Interp 3 and Datapath Interp 8.
The ACE App states a DAC Clock Rate of 11.79648 GHz, which i provided with my RF signal generator at 0dBm power. I also tried other frequencies as clock signals but with no success of getting a nice CW signal as output.
There you can see a screenshot of the ACE App after configuring all settings with RF clock signal ON.
Compared to the internal clock example the DAC PLL locked LED is not on in the GUI and there is also no CW output signal of the DAC.
Has anyone had success clocking the EVAL-AD9173-FMC-EBZ with an external clock signal and generate a CW signal?
Thank you,
Max
