Post Go back to editing

How to use the QSIP write multibyte registers

Category: Datasheet/Specs
Product Number: AD3551R

Hi ADI Team,

I am using the AD3551R and have encountered some confusion regarding the multibyte register settings. In the section on 'Multibyte Registers', it is mentioned that multibyte registers can only be transferred in a single SPI transaction. However, when I need a fast rate and must update the DAC register data with QSPI, this seems contradictory. Am I missing some important details? I have tried to read the datasheet for answers but found nothing specific on this. I hope you can provide some clarification. Thank you very much.

  • Hi  ,

    This is to acknowledge your query. Please give the product owner ( ) a brief period to look into this and provide you with a response.

    Regards,
    Zaeefa

  • That specific note refers to the limitation of writing multi-byte registers partially. If a register has 2 or 3 bytes, all of them must be written within the same SPI transaction, otherwise an error is produced and the register remains unchanged.

    Note that multi-byte registers can only be written in descending order, therefore the starting address for register CH0_DAC_16B is 0x2A and data must be serialized starting from the MSB.

    The AD3551R allows writing multiple registers in a row. As long as CS is held low, the address pointer keeps decrementing with every data byte received. Therefore it is possible to write a block of contiguous registers in a single SPI frame, starting from the highest address.

    In addition to this, if streaming is enabled and the register STREAM_MODE contains a value different than 0, the address pointer loops back to the starting address after the specified number of bytes, allowing continuously writing a register or a block of registers in an indefinitely long SPI frame. This mode is used for waveform playback with minimum overhead.