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AD9747 amplitude and frequency response compensation filter

Category: Hardware
Product Number: AD9747 , AD974

Is it possible to design a FIR digital filter using FPGA to compensate the amplitude-frequency response of AD9747?

Such as the RZ mode in the figure below.

As shown in Figure AD9854, a digital filter with the opposite response of AD9747 is designed using FPGA to effectively compensate amplitude-frequency distortion.

Assuming that the clock frequency of the AD9747 is 250MHz and the frequency range of the DDS output is 10Hz to 40MHz, how to design a compensation filter in the FPGA?