Circuit for CLOCK input to DAC

Question

I am having confusion for DAC clock input circuitry as mentioned in datasheet. If suppose I am using ADCLK905 ECL Clock/Data Buffers as Recommended Clock Drivers For low-jitter performance: ADCLK905, ADCLK907, ADCLK925 .@ https://www.analog.com/en/products/ad9783.html#product-requirement then should I need additional circuit as mentioned in ad9783 datasheet after the output of ADCLK905 or should I directly feed the output of ADCLK905 to dac ad9783. 
 so this following circuitry is correct or not? should I remove DAC CLK drive circuit?

JMMina · Accepted Answer

Hi infinite , 
 The DAC CLK Drive circuit is needed. You can use the circuitry in the AD9783 evaluation board schematic (found in the Wiki User Guide for AD9783 evaluation board ). There are 200&Omega; terminating resistors used to DC bias the LVPECL emitter follower output stage of the ADCLK905 and provide the required DC path to ground. The value of this resistor is not critical as it only serves to bias the output stage. Typical resistor values are between 180-250&Omega; to approximate the output bias current. 
 
 Best regards, Marco)

Popular Forums

Product Forums

Application Forums

Design Center Forums

Highlighted Webinar

Places

Libraries

Challenge Yourself!

What's Brewing

Places

Resources

Visit ContentZone

The Latest Read

New Release

Recent Technical Insights

Products Mentioned

Thread Details

Circuit for CLOCK input to DAC

Thread Summary