AD9176 + ADS7-V2EB7 Problems.

Hi,

As you are following the hardware setup details and example software setup procedure provided in the AD917x-FMC-EBZ Evaluation Board User Guide wiki page,  JESD PLL Locked, DAC PLL Locked, DAC DLL Locked and logical lanes on both links should be high after SERDES status readback.

Can you please send screenshots of ACE and DPGDownloader setups?

Thanks

Thank you so much for your response! Here are the pictures of the DPG and ACE programs, and the board settings are as follows.

I still haven't been able to find the root cause, so I would really appreciate any assistance you can provide.

Hi,

The evaluation board user guide is using AD9172 for example software setup  procedure.

AD9176 may not be configured using the same settings. See Table 13 JESD204B Supported Operating Modes and Interpolation Combinations on page 29 in AD9176 datasheet. 

Can you try setting up the AD9176-FMC-EBZ evaluation board in the conditions below and let me know if it works.

JESD Mode 4 Dual Link
Channel Interp: 4x
Datapath Interp: 8x
Input Data Rate: 368.64MHz (should also be changed in DPGDownloader)
PLL Reference Clock Frequency: 122.88MHz
Channel NCO Shifts: ±152.5MHz
Final NCO Shifts: 1.9875GHz
DAC Rate:11.79648GHz
SERDES Lane Rate:7.38Gbps

Hi,

The evaluation board user guide is using AD9172 for example software setup  procedure.

AD9176 may not be configured using the same settings. See Table 13 JESD204B Supported Operating Modes and Interpolation Combinations on page 29 in AD9176 datasheet. 

Can you try setting up the AD9176-FMC-EBZ evaluation board in the conditions below and let me know if it works.

JESD Mode 4 Dual Link
Channel Interp: 4x
Datapath Interp: 8x
Input Data Rate: 368.64MHz (should also be changed in DPGDownloader)
PLL Reference Clock Frequency: 122.88MHz
Channel NCO Shifts: ±152.5MHz
Final NCO Shifts: 1.9875GHz
DAC Rate:11.79648GHz
SERDES Lane Rate:7.38Gbps

I really appreciate your response!

As you suggested, I tried making the modifications as shown in the pictures, but unfortunately, there seems to be no change.

After completing the settings, should there be any changes in the program or on the board when pressing the Stop, Download, Resync, Play buttons within the DPG program or clicking on Read SERDES status in the ACE program?

Currently, only the LEDs on the board are blinking, and there is no other noticeable change. Thank you once again.

Please check if you had configured the board for direct clocking for NCO only mode. 

When using a JESD204B link to the AD917x, you need to configure the AD917X-FMC-EBZ for on board clocking (remove C34 and C35 and populate C36 and C38) so all necessary clocks are generated using the on-board clocking IC, the HMC7044.

Regards

I really appreciate your response. After checking, I found that I wasn't using the NCO mode, and C36 and C38 were properly connected.

I apologize for the continued inconvenience.

I attach a photo for your reference.

Thank you once again.

It looks all 4 capacitors on clock input trace are removed so clock input pins are unconnected.

You need to install C36 and C38 so the clock input is connected to on board clocking IC HMC7044.

I apologize. It seems that I didn't capture the photo properly. Upon closer capture, it appears that C36 and C38 capacitor are SMT.

Thank you very much for always providing responses.

Hi,

Were you able to get the board to work?

Best

Sorry for the delay in my response.

Originally, C36 and C38 were in place, and even after re-executing, the same issue persists.

I thought it might be due to my Os Windows 11 computer, but I also tested it on another Windows 10 computer with the same outcome.

Is there any demo video? I appreciate your ongoing interest and support.